From 77549a7809c3c9c53dd2573187324ba9d4bd3b42 Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Fri, 4 Apr 2014 08:12:28 +0200 Subject: target-i386: introduce support for 1 GB pages Given the simplifications to the code in the previous patches, this is now very simple to do. Signed-off-by: Paolo Bonzini --- target-i386/cpu.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'target-i386/cpu.c') diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 042a48d..0f400d4 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -569,9 +569,7 @@ struct X86CPUDefinition { CPUID_EXT_RDRAND */ #define TCG_EXT2_FEATURES ((TCG_FEATURES & CPUID_EXT2_AMD_ALIASES) | \ CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \ - CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT) - /* missing: - CPUID_EXT2_PDPE1GB */ + CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_PDPE1GB) #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \ CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A) #define TCG_SVM_FEATURES 0 -- cgit v1.1 From de431a655a7560d834e1187d6b30cb6b1946e90c Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Tue, 27 May 2014 12:31:28 +0200 Subject: target-i386: support long addresses for 4MB pages (PSE-36) 4MB pages can use 40-bit addresses by putting the higher 8 bits in bits 20-13 of the PDE. Bit 21 is reserved. Signed-off-by: Paolo Bonzini --- target-i386/cpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'target-i386/cpu.c') diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 0f400d4..c8ef936 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -552,8 +552,7 @@ struct X86CPUDefinition { CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \ CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS) /* partly implemented: - CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64) - CPUID_PSE36 (needed for Solaris) */ + CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64) */ /* missing: CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */ #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | \ -- cgit v1.1