From 3d5c84ff21a8a7a3bfb3a75154be8905e62f51db Mon Sep 17 00:00:00 2001 From: Sergey Fedorov Date: Sun, 26 Apr 2015 16:49:26 +0100 Subject: target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled Signed-off-by: Sergey Fedorov Message-id: 1429669112-29835-1-git-send-email-serge.fdrv@gmail.com Reviewed-by: Greg Bellows Signed-off-by: Peter Maydell --- target-arm/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'target-arm') diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 3b5a93d..3ca3fa8 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -524,9 +524,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) unset_feature(env, ARM_FEATURE_EL3); /* Disable the security extension feature bits in the processor feature - * register as well. This is id_pfr1[7:4]. + * registers as well. These are id_pfr1[7:4] and id_aa64pfr0[15:12]. */ cpu->id_pfr1 &= ~0xf0; + cpu->id_aa64pfr0 &= ~0xf000; } register_cp_regs_for_features(cpu); -- cgit v1.1