From cdd58c70fbcb7276d3df656941278e4395ecce14 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 28 Oct 2020 13:30:07 +0800 Subject: hw/riscv: microchip_pfsoc: Connect the SYSREG module Previously SYSREG was created as an unimplemented device. Now that we have a simple SYSREG module, connect it. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 1603863010-15807-8-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis --- include/hw/riscv/microchip_pfsoc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/hw/riscv/microchip_pfsoc.h b/include/hw/riscv/microchip_pfsoc.h index a244ae6..245c82d 100644 --- a/include/hw/riscv/microchip_pfsoc.h +++ b/include/hw/riscv/microchip_pfsoc.h @@ -26,6 +26,7 @@ #include "hw/dma/sifive_pdma.h" #include "hw/misc/mchp_pfsoc_dmc.h" #include "hw/misc/mchp_pfsoc_ioscb.h" +#include "hw/misc/mchp_pfsoc_sysreg.h" #include "hw/net/cadence_gem.h" #include "hw/sd/cadence_sdhci.h" @@ -47,6 +48,7 @@ typedef struct MicrochipPFSoCState { MchpPfSoCMMUartState *serial2; MchpPfSoCMMUartState *serial3; MchpPfSoCMMUartState *serial4; + MchpPfSoCSysregState sysreg; SiFivePDMAState dma; CadenceGEMState gem0; CadenceGEMState gem1; -- cgit v1.1