From 29ecf2de024b386acc72b53b9eb0c3559883d1b6 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Thu, 12 Oct 2023 09:34:58 +0200 Subject: hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The file is obviously related to the raspberrypi machine, so it should reside in hw/arm/ instead of hw/misc/. And while we're at it, also adjust the wildcard in MAINTAINERS so that it covers this file, too. Signed-off-by: Thomas Huth Reviewed-by: Alex Bennée Acked-by: Philippe Mathieu-Daudé Message-id: 20231012073458.860187-1-thuth@redhat.com Signed-off-by: Peter Maydell --- include/hw/arm/raspberrypi-fw-defs.h | 163 ++++++++++++++++++++++++++++++++++ include/hw/misc/raspberrypi-fw-defs.h | 163 ---------------------------------- 2 files changed, 163 insertions(+), 163 deletions(-) create mode 100644 include/hw/arm/raspberrypi-fw-defs.h delete mode 100644 include/hw/misc/raspberrypi-fw-defs.h (limited to 'include') diff --git a/include/hw/arm/raspberrypi-fw-defs.h b/include/hw/arm/raspberrypi-fw-defs.h new file mode 100644 index 0000000..4551fe7 --- /dev/null +++ b/include/hw/arm/raspberrypi-fw-defs.h @@ -0,0 +1,163 @@ +/* + * Raspberry Pi firmware definitions + * + * Copyright (C) 2022 Auriga LLC, based on Linux kernel + * `include/soc/bcm2835/raspberrypi-firmware.h` (Copyright © 2015 Broadcom) + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ +#define INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ + +#include "qemu/osdep.h" + +enum rpi_firmware_property_tag { + RPI_FWREQ_PROPERTY_END = 0, + RPI_FWREQ_GET_FIRMWARE_REVISION = 0x00000001, + RPI_FWREQ_GET_FIRMWARE_VARIANT = 0x00000002, + RPI_FWREQ_GET_FIRMWARE_HASH = 0x00000003, + + RPI_FWREQ_SET_CURSOR_INFO = 0x00008010, + RPI_FWREQ_SET_CURSOR_STATE = 0x00008011, + + RPI_FWREQ_GET_BOARD_MODEL = 0x00010001, + RPI_FWREQ_GET_BOARD_REVISION = 0x00010002, + RPI_FWREQ_GET_BOARD_MAC_ADDRESS = 0x00010003, + RPI_FWREQ_GET_BOARD_SERIAL = 0x00010004, + RPI_FWREQ_GET_ARM_MEMORY = 0x00010005, + RPI_FWREQ_GET_VC_MEMORY = 0x00010006, + RPI_FWREQ_GET_CLOCKS = 0x00010007, + RPI_FWREQ_GET_POWER_STATE = 0x00020001, + RPI_FWREQ_GET_TIMING = 0x00020002, + RPI_FWREQ_SET_POWER_STATE = 0x00028001, + RPI_FWREQ_GET_CLOCK_STATE = 0x00030001, + RPI_FWREQ_GET_CLOCK_RATE = 0x00030002, + RPI_FWREQ_GET_VOLTAGE = 0x00030003, + RPI_FWREQ_GET_MAX_CLOCK_RATE = 0x00030004, + RPI_FWREQ_GET_MAX_VOLTAGE = 0x00030005, + RPI_FWREQ_GET_TEMPERATURE = 0x00030006, + RPI_FWREQ_GET_MIN_CLOCK_RATE = 0x00030007, + RPI_FWREQ_GET_MIN_VOLTAGE = 0x00030008, + RPI_FWREQ_GET_TURBO = 0x00030009, + RPI_FWREQ_GET_MAX_TEMPERATURE = 0x0003000a, + RPI_FWREQ_GET_STC = 0x0003000b, + RPI_FWREQ_ALLOCATE_MEMORY = 0x0003000c, + RPI_FWREQ_LOCK_MEMORY = 0x0003000d, + RPI_FWREQ_UNLOCK_MEMORY = 0x0003000e, + RPI_FWREQ_RELEASE_MEMORY = 0x0003000f, + RPI_FWREQ_EXECUTE_CODE = 0x00030010, + RPI_FWREQ_EXECUTE_QPU = 0x00030011, + RPI_FWREQ_SET_ENABLE_QPU = 0x00030012, + RPI_FWREQ_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014, + RPI_FWREQ_GET_EDID_BLOCK = 0x00030020, + RPI_FWREQ_GET_CUSTOMER_OTP = 0x00030021, + RPI_FWREQ_GET_EDID_BLOCK_DISPLAY = 0x00030023, + RPI_FWREQ_GET_DOMAIN_STATE = 0x00030030, + RPI_FWREQ_GET_THROTTLED = 0x00030046, + RPI_FWREQ_GET_CLOCK_MEASURED = 0x00030047, + RPI_FWREQ_NOTIFY_REBOOT = 0x00030048, + RPI_FWREQ_SET_CLOCK_STATE = 0x00038001, + RPI_FWREQ_SET_CLOCK_RATE = 0x00038002, + RPI_FWREQ_SET_VOLTAGE = 0x00038003, + RPI_FWREQ_SET_MAX_CLOCK_RATE = 0x00038004, + RPI_FWREQ_SET_MIN_CLOCK_RATE = 0x00038007, + RPI_FWREQ_SET_TURBO = 0x00038009, + RPI_FWREQ_SET_CUSTOMER_OTP = 0x00038021, + RPI_FWREQ_SET_DOMAIN_STATE = 0x00038030, + RPI_FWREQ_GET_GPIO_STATE = 0x00030041, + RPI_FWREQ_SET_GPIO_STATE = 0x00038041, + RPI_FWREQ_SET_SDHOST_CLOCK = 0x00038042, + RPI_FWREQ_GET_GPIO_CONFIG = 0x00030043, + RPI_FWREQ_SET_GPIO_CONFIG = 0x00038043, + RPI_FWREQ_GET_PERIPH_REG = 0x00030045, + RPI_FWREQ_SET_PERIPH_REG = 0x00038045, + RPI_FWREQ_GET_POE_HAT_VAL = 0x00030049, + RPI_FWREQ_SET_POE_HAT_VAL = 0x00038049, + RPI_FWREQ_SET_POE_HAT_VAL_OLD = 0x00030050, + RPI_FWREQ_NOTIFY_XHCI_RESET = 0x00030058, + RPI_FWREQ_GET_REBOOT_FLAGS = 0x00030064, + RPI_FWREQ_SET_REBOOT_FLAGS = 0x00038064, + RPI_FWREQ_NOTIFY_DISPLAY_DONE = 0x00030066, + + /* Dispmanx TAGS */ + RPI_FWREQ_FRAMEBUFFER_ALLOCATE = 0x00040001, + RPI_FWREQ_FRAMEBUFFER_BLANK = 0x00040002, + RPI_FWREQ_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT = 0x00040003, + RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_WIDTH_HEIGHT = 0x00040004, + RPI_FWREQ_FRAMEBUFFER_GET_DEPTH = 0x00040005, + RPI_FWREQ_FRAMEBUFFER_GET_PIXEL_ORDER = 0x00040006, + RPI_FWREQ_FRAMEBUFFER_GET_ALPHA_MODE = 0x00040007, + RPI_FWREQ_FRAMEBUFFER_GET_PITCH = 0x00040008, + RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009, + RPI_FWREQ_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a, + RPI_FWREQ_FRAMEBUFFER_GET_PALETTE = 0x0004000b, + RPI_FWREQ_FRAMEBUFFER_GET_LAYER = 0x0004000c, + RPI_FWREQ_FRAMEBUFFER_GET_TRANSFORM = 0x0004000d, + RPI_FWREQ_FRAMEBUFFER_GET_VSYNC = 0x0004000e, + RPI_FWREQ_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, + RPI_FWREQ_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, + RPI_FWREQ_FRAMEBUFFER_RELEASE = 0x00048001, + RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_ID = 0x00040016, + RPI_FWREQ_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013, + RPI_FWREQ_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013, + RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014, + RPI_FWREQ_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, + RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, + RPI_FWREQ_FRAMEBUFFER_TEST_DEPTH = 0x00044005, + RPI_FWREQ_FRAMEBUFFER_TEST_PIXEL_ORDER = 0x00044006, + RPI_FWREQ_FRAMEBUFFER_TEST_ALPHA_MODE = 0x00044007, + RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009, + RPI_FWREQ_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a, + RPI_FWREQ_FRAMEBUFFER_TEST_PALETTE = 0x0004400b, + RPI_FWREQ_FRAMEBUFFER_TEST_LAYER = 0x0004400c, + RPI_FWREQ_FRAMEBUFFER_TEST_TRANSFORM = 0x0004400d, + RPI_FWREQ_FRAMEBUFFER_TEST_VSYNC = 0x0004400e, + RPI_FWREQ_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, + RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, + RPI_FWREQ_FRAMEBUFFER_SET_DEPTH = 0x00048005, + RPI_FWREQ_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, + RPI_FWREQ_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, + RPI_FWREQ_FRAMEBUFFER_SET_PITCH = 0x00048008, + RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, + RPI_FWREQ_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, + RPI_FWREQ_FRAMEBUFFER_SET_PALETTE = 0x0004800b, + + RPI_FWREQ_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, + RPI_FWREQ_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, + RPI_FWREQ_FRAMEBUFFER_SET_VSYNC = 0x0004800e, + RPI_FWREQ_FRAMEBUFFER_SET_LAYER = 0x0004800c, + RPI_FWREQ_FRAMEBUFFER_SET_TRANSFORM = 0x0004800d, + RPI_FWREQ_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, + + RPI_FWREQ_VCHIQ_INIT = 0x00048010, + + RPI_FWREQ_SET_PLANE = 0x00048015, + RPI_FWREQ_GET_DISPLAY_TIMING = 0x00040017, + RPI_FWREQ_SET_TIMING = 0x00048017, + RPI_FWREQ_GET_DISPLAY_CFG = 0x00040018, + RPI_FWREQ_SET_DISPLAY_POWER = 0x00048019, + RPI_FWREQ_GET_COMMAND_LINE = 0x00050001, + RPI_FWREQ_GET_DMA_CHANNELS = 0x00060001, +}; + +enum rpi_firmware_clk_id { + RPI_FIRMWARE_EMMC_CLK_ID = 1, + RPI_FIRMWARE_UART_CLK_ID, + RPI_FIRMWARE_ARM_CLK_ID, + RPI_FIRMWARE_CORE_CLK_ID, + RPI_FIRMWARE_V3D_CLK_ID, + RPI_FIRMWARE_H264_CLK_ID, + RPI_FIRMWARE_ISP_CLK_ID, + RPI_FIRMWARE_SDRAM_CLK_ID, + RPI_FIRMWARE_PIXEL_CLK_ID, + RPI_FIRMWARE_PWM_CLK_ID, + RPI_FIRMWARE_HEVC_CLK_ID, + RPI_FIRMWARE_EMMC2_CLK_ID, + RPI_FIRMWARE_M2MC_CLK_ID, + RPI_FIRMWARE_PIXEL_BVB_CLK_ID, + RPI_FIRMWARE_VEC_CLK_ID, + RPI_FIRMWARE_NUM_CLK_ID, +}; + +#endif /* INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ */ diff --git a/include/hw/misc/raspberrypi-fw-defs.h b/include/hw/misc/raspberrypi-fw-defs.h deleted file mode 100644 index 4551fe7..0000000 --- a/include/hw/misc/raspberrypi-fw-defs.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Raspberry Pi firmware definitions - * - * Copyright (C) 2022 Auriga LLC, based on Linux kernel - * `include/soc/bcm2835/raspberrypi-firmware.h` (Copyright © 2015 Broadcom) - * - * SPDX-License-Identifier: GPL-2.0-or-later - */ - -#ifndef INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ -#define INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ - -#include "qemu/osdep.h" - -enum rpi_firmware_property_tag { - RPI_FWREQ_PROPERTY_END = 0, - RPI_FWREQ_GET_FIRMWARE_REVISION = 0x00000001, - RPI_FWREQ_GET_FIRMWARE_VARIANT = 0x00000002, - RPI_FWREQ_GET_FIRMWARE_HASH = 0x00000003, - - RPI_FWREQ_SET_CURSOR_INFO = 0x00008010, - RPI_FWREQ_SET_CURSOR_STATE = 0x00008011, - - RPI_FWREQ_GET_BOARD_MODEL = 0x00010001, - RPI_FWREQ_GET_BOARD_REVISION = 0x00010002, - RPI_FWREQ_GET_BOARD_MAC_ADDRESS = 0x00010003, - RPI_FWREQ_GET_BOARD_SERIAL = 0x00010004, - RPI_FWREQ_GET_ARM_MEMORY = 0x00010005, - RPI_FWREQ_GET_VC_MEMORY = 0x00010006, - RPI_FWREQ_GET_CLOCKS = 0x00010007, - RPI_FWREQ_GET_POWER_STATE = 0x00020001, - RPI_FWREQ_GET_TIMING = 0x00020002, - RPI_FWREQ_SET_POWER_STATE = 0x00028001, - RPI_FWREQ_GET_CLOCK_STATE = 0x00030001, - RPI_FWREQ_GET_CLOCK_RATE = 0x00030002, - RPI_FWREQ_GET_VOLTAGE = 0x00030003, - RPI_FWREQ_GET_MAX_CLOCK_RATE = 0x00030004, - RPI_FWREQ_GET_MAX_VOLTAGE = 0x00030005, - RPI_FWREQ_GET_TEMPERATURE = 0x00030006, - RPI_FWREQ_GET_MIN_CLOCK_RATE = 0x00030007, - RPI_FWREQ_GET_MIN_VOLTAGE = 0x00030008, - RPI_FWREQ_GET_TURBO = 0x00030009, - RPI_FWREQ_GET_MAX_TEMPERATURE = 0x0003000a, - RPI_FWREQ_GET_STC = 0x0003000b, - RPI_FWREQ_ALLOCATE_MEMORY = 0x0003000c, - RPI_FWREQ_LOCK_MEMORY = 0x0003000d, - RPI_FWREQ_UNLOCK_MEMORY = 0x0003000e, - RPI_FWREQ_RELEASE_MEMORY = 0x0003000f, - RPI_FWREQ_EXECUTE_CODE = 0x00030010, - RPI_FWREQ_EXECUTE_QPU = 0x00030011, - RPI_FWREQ_SET_ENABLE_QPU = 0x00030012, - RPI_FWREQ_GET_DISPMANX_RESOURCE_MEM_HANDLE = 0x00030014, - RPI_FWREQ_GET_EDID_BLOCK = 0x00030020, - RPI_FWREQ_GET_CUSTOMER_OTP = 0x00030021, - RPI_FWREQ_GET_EDID_BLOCK_DISPLAY = 0x00030023, - RPI_FWREQ_GET_DOMAIN_STATE = 0x00030030, - RPI_FWREQ_GET_THROTTLED = 0x00030046, - RPI_FWREQ_GET_CLOCK_MEASURED = 0x00030047, - RPI_FWREQ_NOTIFY_REBOOT = 0x00030048, - RPI_FWREQ_SET_CLOCK_STATE = 0x00038001, - RPI_FWREQ_SET_CLOCK_RATE = 0x00038002, - RPI_FWREQ_SET_VOLTAGE = 0x00038003, - RPI_FWREQ_SET_MAX_CLOCK_RATE = 0x00038004, - RPI_FWREQ_SET_MIN_CLOCK_RATE = 0x00038007, - RPI_FWREQ_SET_TURBO = 0x00038009, - RPI_FWREQ_SET_CUSTOMER_OTP = 0x00038021, - RPI_FWREQ_SET_DOMAIN_STATE = 0x00038030, - RPI_FWREQ_GET_GPIO_STATE = 0x00030041, - RPI_FWREQ_SET_GPIO_STATE = 0x00038041, - RPI_FWREQ_SET_SDHOST_CLOCK = 0x00038042, - RPI_FWREQ_GET_GPIO_CONFIG = 0x00030043, - RPI_FWREQ_SET_GPIO_CONFIG = 0x00038043, - RPI_FWREQ_GET_PERIPH_REG = 0x00030045, - RPI_FWREQ_SET_PERIPH_REG = 0x00038045, - RPI_FWREQ_GET_POE_HAT_VAL = 0x00030049, - RPI_FWREQ_SET_POE_HAT_VAL = 0x00038049, - RPI_FWREQ_SET_POE_HAT_VAL_OLD = 0x00030050, - RPI_FWREQ_NOTIFY_XHCI_RESET = 0x00030058, - RPI_FWREQ_GET_REBOOT_FLAGS = 0x00030064, - RPI_FWREQ_SET_REBOOT_FLAGS = 0x00038064, - RPI_FWREQ_NOTIFY_DISPLAY_DONE = 0x00030066, - - /* Dispmanx TAGS */ - RPI_FWREQ_FRAMEBUFFER_ALLOCATE = 0x00040001, - RPI_FWREQ_FRAMEBUFFER_BLANK = 0x00040002, - RPI_FWREQ_FRAMEBUFFER_GET_PHYSICAL_WIDTH_HEIGHT = 0x00040003, - RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_WIDTH_HEIGHT = 0x00040004, - RPI_FWREQ_FRAMEBUFFER_GET_DEPTH = 0x00040005, - RPI_FWREQ_FRAMEBUFFER_GET_PIXEL_ORDER = 0x00040006, - RPI_FWREQ_FRAMEBUFFER_GET_ALPHA_MODE = 0x00040007, - RPI_FWREQ_FRAMEBUFFER_GET_PITCH = 0x00040008, - RPI_FWREQ_FRAMEBUFFER_GET_VIRTUAL_OFFSET = 0x00040009, - RPI_FWREQ_FRAMEBUFFER_GET_OVERSCAN = 0x0004000a, - RPI_FWREQ_FRAMEBUFFER_GET_PALETTE = 0x0004000b, - RPI_FWREQ_FRAMEBUFFER_GET_LAYER = 0x0004000c, - RPI_FWREQ_FRAMEBUFFER_GET_TRANSFORM = 0x0004000d, - RPI_FWREQ_FRAMEBUFFER_GET_VSYNC = 0x0004000e, - RPI_FWREQ_FRAMEBUFFER_GET_TOUCHBUF = 0x0004000f, - RPI_FWREQ_FRAMEBUFFER_GET_GPIOVIRTBUF = 0x00040010, - RPI_FWREQ_FRAMEBUFFER_RELEASE = 0x00048001, - RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_ID = 0x00040016, - RPI_FWREQ_FRAMEBUFFER_SET_DISPLAY_NUM = 0x00048013, - RPI_FWREQ_FRAMEBUFFER_GET_NUM_DISPLAYS = 0x00040013, - RPI_FWREQ_FRAMEBUFFER_GET_DISPLAY_SETTINGS = 0x00040014, - RPI_FWREQ_FRAMEBUFFER_TEST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, - RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, - RPI_FWREQ_FRAMEBUFFER_TEST_DEPTH = 0x00044005, - RPI_FWREQ_FRAMEBUFFER_TEST_PIXEL_ORDER = 0x00044006, - RPI_FWREQ_FRAMEBUFFER_TEST_ALPHA_MODE = 0x00044007, - RPI_FWREQ_FRAMEBUFFER_TEST_VIRTUAL_OFFSET = 0x00044009, - RPI_FWREQ_FRAMEBUFFER_TEST_OVERSCAN = 0x0004400a, - RPI_FWREQ_FRAMEBUFFER_TEST_PALETTE = 0x0004400b, - RPI_FWREQ_FRAMEBUFFER_TEST_LAYER = 0x0004400c, - RPI_FWREQ_FRAMEBUFFER_TEST_TRANSFORM = 0x0004400d, - RPI_FWREQ_FRAMEBUFFER_TEST_VSYNC = 0x0004400e, - RPI_FWREQ_FRAMEBUFFER_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, - RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, - RPI_FWREQ_FRAMEBUFFER_SET_DEPTH = 0x00048005, - RPI_FWREQ_FRAMEBUFFER_SET_PIXEL_ORDER = 0x00048006, - RPI_FWREQ_FRAMEBUFFER_SET_ALPHA_MODE = 0x00048007, - RPI_FWREQ_FRAMEBUFFER_SET_PITCH = 0x00048008, - RPI_FWREQ_FRAMEBUFFER_SET_VIRTUAL_OFFSET = 0x00048009, - RPI_FWREQ_FRAMEBUFFER_SET_OVERSCAN = 0x0004800a, - RPI_FWREQ_FRAMEBUFFER_SET_PALETTE = 0x0004800b, - - RPI_FWREQ_FRAMEBUFFER_SET_TOUCHBUF = 0x0004801f, - RPI_FWREQ_FRAMEBUFFER_SET_GPIOVIRTBUF = 0x00048020, - RPI_FWREQ_FRAMEBUFFER_SET_VSYNC = 0x0004800e, - RPI_FWREQ_FRAMEBUFFER_SET_LAYER = 0x0004800c, - RPI_FWREQ_FRAMEBUFFER_SET_TRANSFORM = 0x0004800d, - RPI_FWREQ_FRAMEBUFFER_SET_BACKLIGHT = 0x0004800f, - - RPI_FWREQ_VCHIQ_INIT = 0x00048010, - - RPI_FWREQ_SET_PLANE = 0x00048015, - RPI_FWREQ_GET_DISPLAY_TIMING = 0x00040017, - RPI_FWREQ_SET_TIMING = 0x00048017, - RPI_FWREQ_GET_DISPLAY_CFG = 0x00040018, - RPI_FWREQ_SET_DISPLAY_POWER = 0x00048019, - RPI_FWREQ_GET_COMMAND_LINE = 0x00050001, - RPI_FWREQ_GET_DMA_CHANNELS = 0x00060001, -}; - -enum rpi_firmware_clk_id { - RPI_FIRMWARE_EMMC_CLK_ID = 1, - RPI_FIRMWARE_UART_CLK_ID, - RPI_FIRMWARE_ARM_CLK_ID, - RPI_FIRMWARE_CORE_CLK_ID, - RPI_FIRMWARE_V3D_CLK_ID, - RPI_FIRMWARE_H264_CLK_ID, - RPI_FIRMWARE_ISP_CLK_ID, - RPI_FIRMWARE_SDRAM_CLK_ID, - RPI_FIRMWARE_PIXEL_CLK_ID, - RPI_FIRMWARE_PWM_CLK_ID, - RPI_FIRMWARE_HEVC_CLK_ID, - RPI_FIRMWARE_EMMC2_CLK_ID, - RPI_FIRMWARE_M2MC_CLK_ID, - RPI_FIRMWARE_PIXEL_BVB_CLK_ID, - RPI_FIRMWARE_VEC_CLK_ID, - RPI_FIRMWARE_NUM_CLK_ID, -}; - -#endif /* INCLUDE_HW_MISC_RASPBERRYPI_FW_DEFS_H_ */ -- cgit v1.1 From 85c90d45f6bd0d931af5ff7cc37a8a34ab285489 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 13 Oct 2023 15:02:14 +0200 Subject: hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit struct arm_boot_info is declared in "hw/arm/boot.h". By including the correct header we don't need to declare it again in "target/arm/cpu-qom.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20231013130214.95742-1-philmd@linaro.org Signed-off-by: Peter Maydell --- include/hw/arm/exynos4210.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index 68db19f..d33fe38 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -30,7 +30,7 @@ #include "hw/intc/exynos4210_gic.h" #include "hw/intc/exynos4210_combiner.h" #include "hw/core/split-irq.h" -#include "target/arm/cpu-qom.h" +#include "hw/arm/boot.h" #include "qom/object.h" #define EXYNOS4210_NCPUS 2 -- cgit v1.1 From b65b4b7ae3c873dc2f8f4ce65ea5cedc45be3938 Mon Sep 17 00:00:00 2001 From: Tong Ho Date: Mon, 2 Oct 2023 22:21:39 -0700 Subject: xlnx-bbram: hw/nvram: Use dot in device type name This replaces the comma (,) to dot (.) in the device type name so the name can be used with the 'driver=' command line option. Signed-off-by: Tong Ho Reviewed-by: Francisco Iglesias Message-id: 20231003052139.199665-1-tong.ho@amd.com Signed-off-by: Peter Maydell --- include/hw/nvram/xlnx-bbram.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/nvram/xlnx-bbram.h b/include/hw/nvram/xlnx-bbram.h index 87d59ef..6fc13f8 100644 --- a/include/hw/nvram/xlnx-bbram.h +++ b/include/hw/nvram/xlnx-bbram.h @@ -34,7 +34,7 @@ #define RMAX_XLNX_BBRAM ((0x4c / 4) + 1) -#define TYPE_XLNX_BBRAM "xlnx,bbram-ctrl" +#define TYPE_XLNX_BBRAM "xlnx.bbram-ctrl" OBJECT_DECLARE_SIMPLE_TYPE(XlnxBBRam, XLNX_BBRAM); struct XlnxBBRam { -- cgit v1.1 From 9036e917f8357f4e5965ebfecdab5964d40e6a40 Mon Sep 17 00:00:00 2001 From: Leif Lindholm Date: Tue, 19 Sep 2023 10:02:27 +0100 Subject: {include/}hw/arm: refactor virt PPI logic GIC Private Peripheral Interrupts (PPI) are defined as GIC INTID 16-31. As in, PPI0 is INTID16 .. PPI15 is INTID31. Arm's Base System Architecture specification (BSA) lists the mandated and recommended private interrupt IDs by INTID, not by PPI index. But current definitions in virt define them by PPI index, complicating cross referencing. Meanwhile, the PPI(x) macro counterintuitively adds 16 to the input value, converting a PPI index to an INTID. Resolve this by redefining the BSA-allocated PPIs by their INTIDs, and replacing the PPI(x) macro with an INTID_TO_PPI(x) one where required. Signed-off-by: Leif Lindholm Message-id: 20230919090229.188092-2-quic_llindhol@quicinc.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/virt.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index e1ddbea..5704d95 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -43,16 +43,16 @@ #define NUM_VIRTIO_TRANSPORTS 32 #define NUM_SMMU_IRQS 4 -#define ARCH_GIC_MAINT_IRQ 9 +#define ARCH_GIC_MAINT_IRQ 25 -#define ARCH_TIMER_VIRT_IRQ 11 -#define ARCH_TIMER_S_EL1_IRQ 13 -#define ARCH_TIMER_NS_EL1_IRQ 14 -#define ARCH_TIMER_NS_EL2_IRQ 10 +#define ARCH_TIMER_VIRT_IRQ 27 +#define ARCH_TIMER_S_EL1_IRQ 29 +#define ARCH_TIMER_NS_EL1_IRQ 30 +#define ARCH_TIMER_NS_EL2_IRQ 26 -#define VIRTUAL_PMU_IRQ 7 +#define VIRTUAL_PMU_IRQ 23 -#define PPI(irq) ((irq) + 16) +#define INTID_TO_PPI(irq) ((irq) - 16) /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ #define PVTIME_SIZE_PER_CPU 64 -- cgit v1.1 From 2419ce83fce2300e61b5e6df256caddaa07a2ae0 Mon Sep 17 00:00:00 2001 From: Leif Lindholm Date: Tue, 19 Sep 2023 10:02:28 +0100 Subject: include/hw/arm: move BSA definitions to bsa.h virt.h defines a number of IRQs that are ultimately described by Arm's Base System Architecture specification. Move these to a dedicated header so that they can be reused by other platforms that do the same. Include that header from virt.h to minimise churn. While we're moving the definitions, sort them into numerical order, and add the ARCH_TIMER_NS_EL2_VIRT_IRQ definition used by sbsa-ref and which will eventually be needed by virt also. Signed-off-by: Leif Lindholm Message-id: 20230919090229.188092-3-quic_llindhol@quicinc.com [PMM: Remove unused PPI_TO_INTID macro; sort numerically; add ARCH_TIMER_NS_EL2_VIRT_IRQ] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/bsa.h | 35 +++++++++++++++++++++++++++++++++++ include/hw/arm/virt.h | 12 +----------- 2 files changed, 36 insertions(+), 11 deletions(-) create mode 100644 include/hw/arm/bsa.h (limited to 'include') diff --git a/include/hw/arm/bsa.h b/include/hw/arm/bsa.h new file mode 100644 index 0000000..8eaab60 --- /dev/null +++ b/include/hw/arm/bsa.h @@ -0,0 +1,35 @@ +/* + * Common definitions for Arm Base System Architecture (BSA) platforms. + * + * Copyright (c) 2015 Linaro Limited + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + * + */ + +#ifndef QEMU_ARM_BSA_H +#define QEMU_ARM_BSA_H + +/* These are architectural INTID values */ +#define VIRTUAL_PMU_IRQ 23 +#define ARCH_GIC_MAINT_IRQ 25 +#define ARCH_TIMER_NS_EL2_IRQ 26 +#define ARCH_TIMER_VIRT_IRQ 27 +#define ARCH_TIMER_NS_EL2_VIRT_IRQ 28 +#define ARCH_TIMER_S_EL1_IRQ 29 +#define ARCH_TIMER_NS_EL1_IRQ 30 + +#define INTID_TO_PPI(irq) ((irq) - 16) + +#endif /* QEMU_ARM_BSA_H */ diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 5704d95..f692398 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -34,6 +34,7 @@ #include "qemu/notify.h" #include "hw/boards.h" #include "hw/arm/boot.h" +#include "hw/arm/bsa.h" #include "hw/block/flash.h" #include "sysemu/kvm.h" #include "hw/intc/arm_gicv3_common.h" @@ -43,17 +44,6 @@ #define NUM_VIRTIO_TRANSPORTS 32 #define NUM_SMMU_IRQS 4 -#define ARCH_GIC_MAINT_IRQ 25 - -#define ARCH_TIMER_VIRT_IRQ 27 -#define ARCH_TIMER_S_EL1_IRQ 29 -#define ARCH_TIMER_NS_EL1_IRQ 30 -#define ARCH_TIMER_NS_EL2_IRQ 26 - -#define VIRTUAL_PMU_IRQ 23 - -#define INTID_TO_PPI(irq) ((irq) - 16) - /* See Linux kernel arch/arm64/include/asm/pvclock-abi.h */ #define PVTIME_SIZE_PER_CPU 64 -- cgit v1.1