From ade67dcd4ac1786637d25bb04a13c836357f44fc Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 1 Feb 2019 14:55:43 +0000 Subject: hw/arm/armsse: Add CPU_IDENTITY block to SSE-200 Instantiate a copy of the CPU_IDENTITY register block for each CPU in an SSE-200. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20190121185118.18550-21-peter.maydell@linaro.org --- include/hw/arm/armsse.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 961dbb3..3914e8e 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -78,6 +78,7 @@ #include "hw/watchdog/cmsdk-apb-watchdog.h" #include "hw/misc/iotkit-sysctl.h" #include "hw/misc/iotkit-sysinfo.h" +#include "hw/misc/armsse-cpuid.h" #include "hw/misc/unimp.h" #include "hw/or-irq.h" #include "hw/core/split-irq.h" @@ -153,6 +154,8 @@ typedef struct ARMSSE { UnimplementedDeviceState cachectrl[SSE_MAX_CPUS]; UnimplementedDeviceState cpusecctrl[SSE_MAX_CPUS]; + ARMSSECPUID cpuid[SSE_MAX_CPUS]; + /* * 'container' holds all devices seen by all CPUs. * 'cpu_container[i]' is the view that CPU i has: this has the -- cgit v1.1