From ad521238b458a6d54ab672ed3f94d5edaa786d5c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 14 Nov 2016 10:12:55 +0100 Subject: ppc/pnv: add a 'xscom_core_base' field to PnvChipClass MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The XSCOM addresses for the core registers are encoded in a slightly different way on POWER8 and POWER9. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- include/hw/ppc/pnv.h | 1 + include/hw/ppc/pnv_xscom.h | 5 ++--- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 7bee658..df98a72 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -69,6 +69,7 @@ typedef struct PnvChipClass { uint64_t cores_mask; hwaddr xscom_base; + hwaddr xscom_core_base; uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); } PnvChipClass; diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 41a5127..0faa184 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -40,7 +40,7 @@ typedef struct PnvXScomInterfaceClass { } PnvXScomInterfaceClass; /* - * Layout of the XSCOM PCB addresses of EX core 1 + * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8) * * GPIO 0x1100xxxx * SCOM 0x1101xxxx @@ -54,8 +54,7 @@ typedef struct PnvXScomInterfaceClass { * PCB SLAVE 0x110Fxxxx */ -#define PNV_XSCOM_EX_BASE 0x10000000 -#define PNV_XSCOM_EX_CORE_BASE(i) (PNV_XSCOM_EX_BASE | (((uint64_t)i) << 24)) +#define PNV_XSCOM_EX_CORE_BASE(base, i) (base | (((uint64_t)i) << 24)) #define PNV_XSCOM_EX_CORE_SIZE 0x100000 #define PNV_XSCOM_LPC_BASE 0xb0020 -- cgit v1.1