From 195cc354696d75e9625cf303a0791404b3215501 Mon Sep 17 00:00:00 2001 From: Klaus Jensen Date: Tue, 1 Oct 2019 13:40:24 +0200 Subject: pci: pass along the return value of dma_memory_rw MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some devices might want to know the return value of dma_memory_rw, so pass it along instead of ignoring it. There are no existing users of the return value, so this patch should be safe. Signed-off-by: Klaus Jensen Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Acked-by: Keith Busch --- include/hw/pci/pci.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 0a59a06..f19ffe6 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -783,8 +783,7 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev) static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir) { - dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir); - return 0; + return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir); } static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr, -- cgit v1.1 From cba0a8a344fea94aa2212e105611b8e099343cb1 Mon Sep 17 00:00:00 2001 From: Klaus Jensen Date: Fri, 12 Apr 2019 20:53:16 +0200 Subject: hw/block/nvme: add support for scatter gather lists For now, support the Data Block, Segment and Last Segment descriptor types. See NVM Express 1.3d, Section 4.4 ("Scatter Gather List (SGL)"). Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- include/block/nvme.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/block/nvme.h b/include/block/nvme.h index 65e68a8..58647bc 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -412,9 +412,9 @@ typedef union NvmeCmdDptr { } NvmeCmdDptr; enum NvmePsdt { - PSDT_PRP = 0x0, - PSDT_SGL_MPTR_CONTIGUOUS = 0x1, - PSDT_SGL_MPTR_SGL = 0x2, + NVME_PSDT_PRP = 0x0, + NVME_PSDT_SGL_MPTR_CONTIGUOUS = 0x1, + NVME_PSDT_SGL_MPTR_SGL = 0x2, }; typedef struct QEMU_PACKED NvmeCmd { -- cgit v1.1 From c1e18246618b3401ba1769bf88d2bcdf49e947aa Mon Sep 17 00:00:00 2001 From: Klaus Jensen Date: Mon, 13 Jan 2020 19:12:50 +0100 Subject: pci: allocate pci id for nvme The emulated nvme device (hw/block/nvme.c) is currently using an internal Intel device id. Prepare to change that by allocating a device id under the 1b36 (Red Hat, Inc.) vendor id. Signed-off-by: Klaus Jensen Acked-by: Gerd Hoffmann Reviewed-by: Maxim Levitsky Reviewed-by: Keith Busch --- include/hw/pci/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index f19ffe6..72ce649 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -106,6 +106,7 @@ extern bool pci_available; #define PCI_DEVICE_ID_REDHAT_XHCI 0x000d #define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e #define PCI_DEVICE_ID_REDHAT_MDPY 0x000f +#define PCI_DEVICE_ID_REDHAT_NVME 0x0010 #define PCI_DEVICE_ID_REDHAT_QXL 0x0100 #define FMT_PCIBUS PRIx64 -- cgit v1.1 From 2fbbecc5cd90ec00027a155f7044f2f70ed84f30 Mon Sep 17 00:00:00 2001 From: Keith Busch Date: Wed, 30 Sep 2020 10:15:50 -0700 Subject: hw/block/nvme: support per-namespace smart log Let the user specify a specific namespace if they want to get access stats for a specific namespace. Signed-off-by: Keith Busch Signed-off-by: Klaus Jensen --- include/block/nvme.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/block/nvme.h b/include/block/nvme.h index 58647bc..868cf53 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -849,6 +849,7 @@ enum NvmeIdCtrlFrmw { }; enum NvmeIdCtrlLpa { + NVME_LPA_NS_SMART = 1 << 0, NVME_LPA_EXTENDED = 1 << 2, }; -- cgit v1.1 From 492f9a8d79f2e815007e985cad8dd73b713722f0 Mon Sep 17 00:00:00 2001 From: Keith Busch Date: Wed, 30 Sep 2020 10:54:05 -0700 Subject: hw/block/nvme: validate command set selected Fail to start the controller if the user requests a command set that the controller does not support. Signed-off-by: Keith Busch Signed-off-by: Klaus Jensen --- include/block/nvme.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/block/nvme.h b/include/block/nvme.h index 868cf53..bc20a2b 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -82,6 +82,10 @@ enum NvmeCapMask { #define NVME_CAP_SET_PMRS(cap, val) (cap |= (uint64_t)(val & CAP_PMR_MASK)\ << CAP_PMR_SHIFT) +enum NvmeCapCss { + NVME_CAP_CSS_NVM = 1 << 0, +}; + enum NvmeCcShift { CC_EN_SHIFT = 0, CC_CSS_SHIFT = 4, -- cgit v1.1 From 8c5cea85934eb7b580ced14f7f188e19880d4c1c Mon Sep 17 00:00:00 2001 From: Keith Busch Date: Wed, 30 Sep 2020 10:58:03 -0700 Subject: hw/block/nvme: support for admin-only command set Signed-off-by: Keith Busch Signed-off-by: Klaus Jensen --- include/block/nvme.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/block/nvme.h b/include/block/nvme.h index bc20a2b..521533f 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -83,7 +83,8 @@ enum NvmeCapMask { << CAP_PMR_SHIFT) enum NvmeCapCss { - NVME_CAP_CSS_NVM = 1 << 0, + NVME_CAP_CSS_NVM = 1 << 0, + NVME_CAP_CSS_ADMIN_ONLY = 1 << 7, }; enum NvmeCcShift { -- cgit v1.1 From 1b48e4611a7a3ee3065d3bb8428f5f6acb5232fe Mon Sep 17 00:00:00 2001 From: Klaus Jensen Date: Wed, 30 Sep 2020 01:19:07 +0200 Subject: hw/block/nvme: reject io commands if only admin command set selected If the host sets CC.CSS to 111b, all commands submitted to I/O queues should be completed with status Invalid Command Opcode. Note that this is technically a v1.4 feature, but it does not hurt to implement before we finally bump the reported version implemented. Reviewed-by: Dmitry Fomichev Signed-off-by: Klaus Jensen Signed-off-by: Keith Busch --- include/block/nvme.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/block/nvme.h b/include/block/nvme.h index 521533f..6de2d5a 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -115,6 +115,11 @@ enum NvmeCcMask { #define NVME_CC_IOSQES(cc) ((cc >> CC_IOSQES_SHIFT) & CC_IOSQES_MASK) #define NVME_CC_IOCQES(cc) ((cc >> CC_IOCQES_SHIFT) & CC_IOCQES_MASK) +enum NvmeCcCss { + NVME_CC_CSS_NVM = 0x0, + NVME_CC_CSS_ADMIN_ONLY = 0x7, +}; + enum NvmeCstsShift { CSTS_RDY_SHIFT = 0, CSTS_CFS_SHIFT = 1, -- cgit v1.1 From 28fee5b5d02d59a2b039c71a0a72292b1bc7f75b Mon Sep 17 00:00:00 2001 From: Gollu Appalanaidu Date: Mon, 19 Oct 2020 12:41:31 +0530 Subject: hw/block/nvme: fix prp mapping status codes Address 0 is not an invalid address. Remove those invalikd checks. Unaligned PRP2 and PRP list entries should result in Invalid PRP Offset status code and not Invalid Field. Fix that. See NVMe Express v1.3d, Section 4.3 ("Physical Region Page Entry and List"). Suggested-by: Keith Busch Signed-off-by: Gollu Appalanaidu Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch --- include/block/nvme.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/block/nvme.h b/include/block/nvme.h index 6de2d5a..8a46d9c 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -655,6 +655,7 @@ enum NvmeStatusCodes { NVME_MD_SGL_LEN_INVALID = 0x0010, NVME_SGL_DESCR_TYPE_INVALID = 0x0011, NVME_INVALID_USE_OF_CMB = 0x0012, + NVME_INVALID_PRP_OFFSET = 0x0013, NVME_LBA_RANGE = 0x0080, NVME_CAP_EXCEEDED = 0x0081, NVME_NS_NOT_READY = 0x0082, -- cgit v1.1