From 7b6bb66f02bc81a6bb5d90a4fe08ab9c6841a936 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Fri, 6 Sep 2019 09:20:17 -0700 Subject: riscv: sifive_u: Fix broken GEM support At present the GEM support in sifive_u machine is seriously broken. The GEM block register base was set to a weird number (0x100900FC), which for no way could work with the cadence_gem model in QEMU. Not like other GEM variants, the FU540-specific GEM has a management block to control 10/100/1000Mbps link speed changes, that is mapped to 0x100a0000. We can simply map it into MMIO space without special handling using create_unimplemented_device(). Update the GEM node compatible string to use the official name used by the upstream Linux kernel, and add the management block reg base & size to the property encoding. Tested with upstream U-Boot and Linux kernel MACB drivers. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Signed-off-by: Palmer Dabbelt --- include/hw/riscv/sifive_u.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 4d4733c..5270851 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -64,7 +64,8 @@ enum { SIFIVE_U_UART1, SIFIVE_U_OTP, SIFIVE_U_DRAM, - SIFIVE_U_GEM + SIFIVE_U_GEM, + SIFIVE_U_GEM_MGMT }; enum { -- cgit v1.1