From 0701a5efa015189248926879e7d44c45cc55515e Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 12 Mar 2020 18:45:47 -0700 Subject: hw/usb: Add basic i.MX USB Phy support Add basic USB PHY support as implemented in i.MX23, i.MX28, i.MX6, and i.MX7 SoCs. The only support really needed - at least to boot Linux - is support for soft reset, which needs to reset various registers to their initial value. Otherwise, just record register values. Reviewed-by: Peter Maydell Signed-off-by: Guenter Roeck Message-id: 20200313014551.12554-2-linux@roeck-us.net Signed-off-by: Peter Maydell --- include/hw/usb/imx-usb-phy.h | 53 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 include/hw/usb/imx-usb-phy.h (limited to 'include') diff --git a/include/hw/usb/imx-usb-phy.h b/include/hw/usb/imx-usb-phy.h new file mode 100644 index 0000000..07f0235 --- /dev/null +++ b/include/hw/usb/imx-usb-phy.h @@ -0,0 +1,53 @@ +#ifndef IMX_USB_PHY_H +#define IMX_USB_PHY_H + +#include "hw/sysbus.h" +#include "qemu/bitops.h" + +enum IMXUsbPhyRegisters { + USBPHY_PWD, + USBPHY_PWD_SET, + USBPHY_PWD_CLR, + USBPHY_PWD_TOG, + USBPHY_TX, + USBPHY_TX_SET, + USBPHY_TX_CLR, + USBPHY_TX_TOG, + USBPHY_RX, + USBPHY_RX_SET, + USBPHY_RX_CLR, + USBPHY_RX_TOG, + USBPHY_CTRL, + USBPHY_CTRL_SET, + USBPHY_CTRL_CLR, + USBPHY_CTRL_TOG, + USBPHY_STATUS, + USBPHY_DEBUG = 0x14, + USBPHY_DEBUG_SET, + USBPHY_DEBUG_CLR, + USBPHY_DEBUG_TOG, + USBPHY_DEBUG0_STATUS, + USBPHY_DEBUG1 = 0x1c, + USBPHY_DEBUG1_SET, + USBPHY_DEBUG1_CLR, + USBPHY_DEBUG1_TOG, + USBPHY_VERSION, + USBPHY_MAX +}; + +#define USBPHY_CTRL_SFTRST BIT(31) + +#define TYPE_IMX_USBPHY "imx.usbphy" +#define IMX_USBPHY(obj) OBJECT_CHECK(IMXUSBPHYState, (obj), TYPE_IMX_USBPHY) + +typedef struct IMXUSBPHYState { + /* */ + SysBusDevice parent_obj; + + /* */ + MemoryRegion iomem; + + uint32_t usbphy[USBPHY_MAX]; +} IMXUSBPHYState; + +#endif /* IMX_USB_PHY_H */ -- cgit v1.1 From 630e2af0ca248da764561cd695b9a7d7ad57e290 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 12 Mar 2020 18:45:48 -0700 Subject: hw/arm/fsl-imx6ul: Fix USB interrupt numbers USB1 and USB2 interrupt numbers were swapped. USB_PHY2 interrupt number is 45. That didn't really matter up to now since the interrupts were not used, but it needs to be fixed to be able to wire up the USB controllers. Fixes: 31cbf933f0e ("i.MX6UL: Add i.MX6UL SOC") Signed-off-by: Guenter Roeck Message-id: 20200313014551.12554-3-linux@roeck-us.net Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/fsl-imx6ul.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index eda389a..5a42078 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -241,10 +241,10 @@ enum FslIMX6ULIRQs { FSL_IMX6UL_UART7_IRQ = 39, FSL_IMX6UL_UART8_IRQ = 40, - FSL_IMX6UL_USB1_IRQ = 42, - FSL_IMX6UL_USB2_IRQ = 43, + FSL_IMX6UL_USB1_IRQ = 43, + FSL_IMX6UL_USB2_IRQ = 42, FSL_IMX6UL_USB_PHY1_IRQ = 44, - FSL_IMX6UL_USB_PHY2_IRQ = 44, + FSL_IMX6UL_USB_PHY2_IRQ = 45, FSL_IMX6UL_CAAM_JQ2_IRQ = 46, FSL_IMX6UL_CAAM_ERR_IRQ = 47, -- cgit v1.1 From 17372bd812dcdd7371a20e6226d2d1bbf415a47b Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 12 Mar 2020 18:45:50 -0700 Subject: hw/arm/fsl-imx6ul: Wire up USB controllers IMX6UL USB controllers are quite similar to IMX7 USB controllers. Wire them up the same way. The only real difference is that wiring up phy devices is necessary to avoid phy reset timeouts in the Linux kernel. Signed-off-by: Guenter Roeck Message-id: 20200313014551.12554-5-linux@roeck-us.net Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/fsl-imx6ul.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h index 5a42078..1a0bab8 100644 --- a/include/hw/arm/fsl-imx6ul.h +++ b/include/hw/arm/fsl-imx6ul.h @@ -34,6 +34,8 @@ #include "hw/sd/sdhci.h" #include "hw/ssi/imx_spi.h" #include "hw/net/imx_fec.h" +#include "hw/usb/chipidea.h" +#include "hw/usb/imx-usb-phy.h" #include "exec/memory.h" #include "cpu.h" @@ -54,6 +56,8 @@ enum FslIMX6ULConfiguration { FSL_IMX6UL_NUM_I2CS = 4, FSL_IMX6UL_NUM_ECSPIS = 4, FSL_IMX6UL_NUM_ADCS = 2, + FSL_IMX6UL_NUM_USB_PHYS = 2, + FSL_IMX6UL_NUM_USBS = 2, }; typedef struct FslIMX6ULState { @@ -77,6 +81,8 @@ typedef struct FslIMX6ULState { IMXFECState eth[FSL_IMX6UL_NUM_ETHS]; SDHCIState usdhc[FSL_IMX6UL_NUM_USDHCS]; IMX2WdtState wdt[FSL_IMX6UL_NUM_WDTS]; + IMXUSBPHYState usbphy[FSL_IMX6UL_NUM_USB_PHYS]; + ChipideaState usb[FSL_IMX6UL_NUM_USBS]; MemoryRegion rom; MemoryRegion caam; MemoryRegion ocram; @@ -145,6 +151,10 @@ enum FslIMX6ULMemoryMap { FSL_IMX6UL_EPIT2_ADDR = 0x020D4000, FSL_IMX6UL_EPIT1_ADDR = 0x020D0000, FSL_IMX6UL_SNVS_HP_ADDR = 0x020CC000, + FSL_IMX6UL_USBPHY2_ADDR = 0x020CA000, + FSL_IMX6UL_USBPHY2_SIZE = (4 * 1024), + FSL_IMX6UL_USBPHY1_ADDR = 0x020C9000, + FSL_IMX6UL_USBPHY1_SIZE = (4 * 1024), FSL_IMX6UL_ANALOG_ADDR = 0x020C8000, FSL_IMX6UL_CCM_ADDR = 0x020C4000, FSL_IMX6UL_WDOG2_ADDR = 0x020C0000, -- cgit v1.1 From 49cd55789bb17dba161fddf1817209999ce1d319 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Thu, 12 Mar 2020 18:45:51 -0700 Subject: hw/arm/fsl-imx6: Wire up USB controllers With this patch, the USB controllers on 'sabrelite' are detected and can be used to boot the system. Signed-off-by: Guenter Roeck Message-id: 20200313014551.12554-6-linux@roeck-us.net Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/fsl-imx6.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 60eadcc..973bcb7 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -30,6 +30,8 @@ #include "hw/sd/sdhci.h" #include "hw/ssi/imx_spi.h" #include "hw/net/imx_fec.h" +#include "hw/usb/chipidea.h" +#include "hw/usb/imx-usb-phy.h" #include "exec/memory.h" #include "cpu.h" @@ -44,6 +46,8 @@ #define FSL_IMX6_NUM_ESDHCS 4 #define FSL_IMX6_NUM_ECSPIS 5 #define FSL_IMX6_NUM_WDTS 2 +#define FSL_IMX6_NUM_USB_PHYS 2 +#define FSL_IMX6_NUM_USBS 4 typedef struct FslIMX6State { /*< private >*/ @@ -62,6 +66,8 @@ typedef struct FslIMX6State { SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; + IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; + ChipideaState usb[FSL_IMX6_NUM_USBS]; IMXFECState eth; MemoryRegion rom; MemoryRegion caam; -- cgit v1.1