From 926c9063dc7929674f670b43eb6979e3f9677d91 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Sun, 29 Nov 2020 20:39:22 +0000 Subject: elf_ops.h: Don't truncate name of the ROM blobs we create Currently the load_elf code assembles the ROM blob name into a local 128 byte fixed-size array. Use g_strdup_printf() instead so that we don't truncate the pathname if it happens to be long. (This matters mostly for monitor 'info roms' output and for the error messages if ROM blobs overlap.) Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20201129203923.10622-4-peter.maydell@linaro.org --- include/hw/elf_ops.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h index 6fdff3d..53e0152 100644 --- a/include/hw/elf_ops.h +++ b/include/hw/elf_ops.h @@ -330,7 +330,6 @@ static int glue(load_elf, SZ)(const char *name, int fd, uint64_t addr, low = (uint64_t)-1, high = 0; GMappedFile *mapped_file = NULL; uint8_t *data = NULL; - char label[128]; int ret = ELF_LOAD_FAILED; if (read(fd, &ehdr, sizeof(ehdr)) != sizeof(ehdr)) @@ -544,7 +543,8 @@ static int glue(load_elf, SZ)(const char *name, int fd, */ if (mem_size != 0) { if (load_rom) { - snprintf(label, sizeof(label), "phdr #%d: %s", i, name); + g_autofree char *label = + g_strdup_printf("phdr #%d: %s", i, name); /* * rom_add_elf_program() takes its own reference to -- cgit v1.1 From 311ca11e3879ba3743cc8ea8e42c12401c5098a9 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Sun, 29 Nov 2020 20:39:23 +0000 Subject: elf_ops.h: Be more verbose with ROM blob names Instead of making the ROM blob name something like: phdr #0: /home/petmay01/linaro/qemu-misc-tests/ldmia-fault.axf make it a little more self-explanatory for people who don't know ELF format details: /home/petmay01/linaro/qemu-misc-tests/ldmia-fault.axf ELF program header segment 0 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20201129203923.10622-5-peter.maydell@linaro.org --- include/hw/elf_ops.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h index 53e0152..8e84368 100644 --- a/include/hw/elf_ops.h +++ b/include/hw/elf_ops.h @@ -544,7 +544,8 @@ static int glue(load_elf, SZ)(const char *name, int fd, if (mem_size != 0) { if (load_rom) { g_autofree char *label = - g_strdup_printf("phdr #%d: %s", i, name); + g_strdup_printf("%s ELF program header segment %d", + name, i); /* * rom_add_elf_program() takes its own reference to -- cgit v1.1 From 50e76a73de1f7fb40fd84df3d5a98067c10cc097 Mon Sep 17 00:00:00 2001 From: Sai Pavan Boddu Date: Fri, 4 Dec 2020 00:52:34 +0530 Subject: usb: Add versal-usb2-ctrl-regs module This module emulates control registers of versal usb2 controller, this is added just to make guest happy. In general this module would control the phy-reset signal from usb controller, data coherency of the transactions, signals the host system errors received from controller. Signed-off-by: Sai Pavan Boddu Signed-off-by: Vikram Garhwal Reviewed-by: Edgar E. Iglesias Reviewed-by: Peter Maydell Message-id: 1607023357-5096-2-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell --- include/hw/usb/xlnx-versal-usb2-ctrl-regs.h | 45 +++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 include/hw/usb/xlnx-versal-usb2-ctrl-regs.h (limited to 'include') diff --git a/include/hw/usb/xlnx-versal-usb2-ctrl-regs.h b/include/hw/usb/xlnx-versal-usb2-ctrl-regs.h new file mode 100644 index 0000000..975a717 --- /dev/null +++ b/include/hw/usb/xlnx-versal-usb2-ctrl-regs.h @@ -0,0 +1,45 @@ +/* + * QEMU model of the VersalUsb2CtrlRegs Register control/Status block for + * USB2.0 controller + * + * Copyright (c) 2020 Xilinx Inc. Vikram Garhwal + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef _XLNX_USB2_REGS_H_ +#define _XLNX_USB2_REGS_H_ + +#define TYPE_XILINX_VERSAL_USB2_CTRL_REGS "xlnx.versal-usb2-ctrl-regs" + +#define XILINX_VERSAL_USB2_CTRL_REGS(obj) \ + OBJECT_CHECK(VersalUsb2CtrlRegs, (obj), TYPE_XILINX_VERSAL_USB2_CTRL_REGS) + +#define USB2_REGS_R_MAX ((0x78 / 4) + 1) + +typedef struct VersalUsb2CtrlRegs { + SysBusDevice parent_obj; + MemoryRegion iomem; + qemu_irq irq_ir; + + uint32_t regs[USB2_REGS_R_MAX]; + RegisterInfo regs_info[USB2_REGS_R_MAX]; +} VersalUsb2CtrlRegs; + +#endif -- cgit v1.1 From 8bbe61f3c10446603514aeee0aafebaaa00e8d07 Mon Sep 17 00:00:00 2001 From: Vikram Garhwal Date: Fri, 4 Dec 2020 00:52:35 +0530 Subject: usb: Add DWC3 model This patch adds skeleton model of dwc3 usb controller attached to xhci-sysbus device. It defines global register space of DWC3 controller, global registers control the AXI/AHB interfaces properties, external FIFO support and event count support. All of which are unimplemented at present,we are only supporting core reset and read of ID register. Signed-off-by: Vikram Garhwal Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias Message-id: 1607023357-5096-3-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell --- include/hw/usb/hcd-dwc3.h | 55 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/hw/usb/hcd-dwc3.h (limited to 'include') diff --git a/include/hw/usb/hcd-dwc3.h b/include/hw/usb/hcd-dwc3.h new file mode 100644 index 0000000..7c804d5 --- /dev/null +++ b/include/hw/usb/hcd-dwc3.h @@ -0,0 +1,55 @@ +/* + * QEMU model of the USB DWC3 host controller emulation. + * + * Copyright (c) 2020 Xilinx Inc. + * + * Written by Vikram Garhwal + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef HCD_DWC3_H +#define HCD_DWC3_H + +#include "hw/usb/hcd-xhci.h" +#include "hw/usb/hcd-xhci-sysbus.h" + +#define TYPE_USB_DWC3 "usb_dwc3" + +#define USB_DWC3(obj) \ + OBJECT_CHECK(USBDWC3, (obj), TYPE_USB_DWC3) + +#define USB_DWC3_R_MAX ((0x530 / 4) + 1) +#define DWC3_SIZE 0x10000 + +typedef struct USBDWC3 { + SysBusDevice parent_obj; + MemoryRegion iomem; + XHCISysbusState sysbus_xhci; + + uint32_t regs[USB_DWC3_R_MAX]; + RegisterInfo regs_info[USB_DWC3_R_MAX]; + + struct { + uint8_t mode; + uint32_t dwc_usb3_user; + } cfg; + +} USBDWC3; + +#endif -- cgit v1.1 From e29c7db19d2cb71df1c02ba523d0c882009a78ec Mon Sep 17 00:00:00 2001 From: Sai Pavan Boddu Date: Fri, 4 Dec 2020 00:52:36 +0530 Subject: usb: xlnx-usb-subsystem: Add xilinx usb subsystem This model is a top level integration wrapper for hcd-dwc3 and versal-usb2-ctrl-regs modules, this is used by xilinx versal soc's and future xilinx usb subsystems would also be part of it. Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias Reviewed-by: Peter Maydell Message-id: 1607023357-5096-4-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell --- include/hw/usb/xlnx-usb-subsystem.h | 45 +++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 include/hw/usb/xlnx-usb-subsystem.h (limited to 'include') diff --git a/include/hw/usb/xlnx-usb-subsystem.h b/include/hw/usb/xlnx-usb-subsystem.h new file mode 100644 index 0000000..739bef7 --- /dev/null +++ b/include/hw/usb/xlnx-usb-subsystem.h @@ -0,0 +1,45 @@ +/* + * QEMU model of the Xilinx usb subsystem + * + * Copyright (c) 2020 Xilinx Inc. Sai Pavan Boddu + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef _XLNX_VERSAL_USB_SUBSYSTEM_H_ +#define _XLNX_VERSAL_USB_SUBSYSTEM_H_ + +#include "hw/usb/xlnx-versal-usb2-ctrl-regs.h" +#include "hw/usb/hcd-dwc3.h" + +#define TYPE_XILINX_VERSAL_USB2 "xlnx.versal-usb2" + +#define VERSAL_USB2(obj) \ + OBJECT_CHECK(VersalUsb2, (obj), TYPE_XILINX_VERSAL_USB2) + +typedef struct VersalUsb2 { + SysBusDevice parent_obj; + MemoryRegion dwc3_mr; + MemoryRegion usb2Ctrl_mr; + + VersalUsb2CtrlRegs usb2Ctrl; + USBDWC3 dwc3; +} VersalUsb2; + +#endif -- cgit v1.1 From 144677d41bf513af64e934fba61bf3220cbe8d5a Mon Sep 17 00:00:00 2001 From: Vikram Garhwal Date: Fri, 4 Dec 2020 00:52:37 +0530 Subject: arm: xlnx-versal: Connect usb to virt-versal Connect VersalUsb2 subsystem to xlnx-versal SOC, its placed in iou of lpd domain and configure it as dual port host controller. Add the respective guest dts nodes for "xlnx-versal-virt" machine. Signed-off-by: Vikram Garhwal Signed-off-by: Sai Pavan Boddu Reviewed-by: Edgar E. Iglesias Message-id: 1607023357-5096-5-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 8ce8e63..2b76885 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -21,6 +21,7 @@ #include "hw/net/cadence_gem.h" #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "qom/object.h" +#include "hw/usb/xlnx-usb-subsystem.h" #define TYPE_XLNX_VERSAL "xlnx-versal" OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) @@ -59,6 +60,7 @@ struct Versal { PL011State uart[XLNX_VERSAL_NR_UARTS]; CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; + VersalUsb2 usb; } iou; } lpd; @@ -88,6 +90,7 @@ struct Versal { #define VERSAL_UART0_IRQ_0 18 #define VERSAL_UART1_IRQ_0 19 +#define VERSAL_USB0_IRQ_0 22 #define VERSAL_GEM0_IRQ_0 56 #define VERSAL_GEM0_WAKE_IRQ_0 57 #define VERSAL_GEM1_IRQ_0 58 @@ -125,6 +128,12 @@ struct Versal { #define MM_OCM 0xfffc0000U #define MM_OCM_SIZE 0x40000 +#define MM_USB2_CTRL_REGS 0xFF9D0000 +#define MM_USB2_CTRL_REGS_SIZE 0x10000 + +#define MM_USB_0 0xFE200000 +#define MM_USB_0_SIZE 0x10000 + #define MM_TOP_DDR 0x0 #define MM_TOP_DDR_SIZE 0x80000000U #define MM_TOP_DDR_2 0x800000000ULL -- cgit v1.1