From 3b76e18520330e2a23c86d7c627c1cd4a3ed32f2 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 12 Aug 2021 10:33:51 +0100 Subject: hw/arm/msf2-soc: Wire up refclk Wire up the refclk for the msf2 SoC. This SoC runs the refclk at a frequency which is programmably either /4, /8, /16 or /32 of the main CPU clock. We don't currently model the register which allows the guest to set the divisor, so implement the refclk as a fixed /32 of the CPU clock (which is the value of the divisor at reset). Signed-off-by: Peter Maydell Reviewed-by: Damien Hedde Message-id: 20210812093356.1946-21-peter.maydell@linaro.org --- include/hw/arm/msf2-soc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h index 01f904c..ce417a6 100644 --- a/include/hw/arm/msf2-soc.h +++ b/include/hw/arm/msf2-soc.h @@ -59,6 +59,7 @@ struct MSF2State { uint64_t esram_size; Clock *m3clk; + Clock *refclk; uint8_t apb0div; uint8_t apb1div; -- cgit v1.1