From 2edd5261fffcc8494936d353ffffe996d191da3b Mon Sep 17 00:00:00 2001 From: Leon Alrae Date: Tue, 15 Mar 2016 09:59:31 +0000 Subject: hw/mips/cps: create CPC block inside CPS Create Cluster Power Controller and add a link to the CPC MemoryRegion in GCR. Guest can enable / map CPC to any physical address by writing to the memory-mapped GCR_CPC_BASE register. Set vp-start-reset property to 1 to allow only first VP to run from reset. Others are brought up by the guest via CPC memory-mapped registers. Signed-off-by: Leon Alrae --- include/hw/mips/cps.h | 2 ++ include/hw/misc/mips_cmgcr.h | 10 ++++++++++ 2 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/hw/mips/cps.h b/include/hw/mips/cps.h index 1b200d6..88be765 100644 --- a/include/hw/mips/cps.h +++ b/include/hw/mips/cps.h @@ -22,6 +22,7 @@ #include "hw/sysbus.h" #include "hw/misc/mips_cmgcr.h" +#include "hw/misc/mips_cpc.h" #define TYPE_MIPS_CPS "mips-cps" #define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS) @@ -35,6 +36,7 @@ typedef struct MIPSCPSState { MemoryRegion container; MIPSGCRState gcr; + MIPSCPCState cpc; } MIPSCPSState; qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number); diff --git a/include/hw/misc/mips_cmgcr.h b/include/hw/misc/mips_cmgcr.h index 69403c3..cc60eef 100644 --- a/include/hw/misc/mips_cmgcr.h +++ b/include/hw/misc/mips_cmgcr.h @@ -26,6 +26,8 @@ #define GCR_CONFIG_OFS 0x0000 #define GCR_BASE_OFS 0x0008 #define GCR_REV_OFS 0x0030 +#define GCR_CPC_BASE_OFS 0x0088 +#define GCR_CPC_STATUS_OFS 0x00F0 #define GCR_L2_CONFIG_OFS 0x0130 /* Core Local and Core Other Block Register Map */ @@ -36,6 +38,11 @@ #define GCR_L2_CONFIG_BYPASS_SHF 20 #define GCR_L2_CONFIG_BYPASS_MSK ((0x1ULL) << GCR_L2_CONFIG_BYPASS_SHF) +/* GCR_CPC_BASE register fields */ +#define GCR_CPC_BASE_CPCEN_MSK 1 +#define GCR_CPC_BASE_CPCBASE_MSK 0xFFFFFFFF8000ULL +#define GCR_CPC_BASE_MSK (GCR_CPC_BASE_CPCEN_MSK | GCR_CPC_BASE_CPCBASE_MSK) + typedef struct MIPSGCRState MIPSGCRState; struct MIPSGCRState { SysBusDevice parent_obj; @@ -44,6 +51,9 @@ struct MIPSGCRState { int32_t num_vps; hwaddr gcr_base; MemoryRegion iomem; + MemoryRegion *cpc_mr; + + uint64_t cpc_base; }; #endif /* _MIPS_GCR_H */ -- cgit v1.1