From 0e5803dfbce6cf056fe15b3b5cb31fe8519a6f6e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 17 Oct 2016 19:22:16 +0100 Subject: aspeed: rename the smc object to fmc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Aspeed SoC has three different types of SMC (Static Memory Controller) controllers: the SMC (legacy), the FMC (the new one) and the SPI for the host PNOR. The FMC and the SPI models are now converging on the AST2500 SoC and the SMC, which was still available on the AST2400 SoC, was removed. The Aspeed SoC does not provide support for the legacy SMC controller. So, let's rename the 'smc' object to 'fmc' to clarify its nature. Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery Message-id: 1474977462-28032-2-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- include/hw/arm/aspeed_soc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 932704c..7359e25 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -31,7 +31,7 @@ typedef struct AspeedSoCState { AspeedTimerCtrlState timerctrl; AspeedI2CState i2c; AspeedSCUState scu; - AspeedSMCState smc; + AspeedSMCState fmc; AspeedSMCState spi; AspeedSDMCState sdmc; } AspeedSoCState; -- cgit v1.1 From dcb834447f7b22b08a918e2266e5751035fbfc83 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 17 Oct 2016 19:22:16 +0100 Subject: aspeed: move the flash module mapping address under the controller definition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This will ease the definition of the new controllers for the AST2500 SoC and also ease the support of the segment registers, which provide a way to reconfigure the mapping window of each slave. Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery Message-id: 1474977462-28032-3-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- include/hw/ssi/aspeed_smc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h index def3b45..bdfbcc0 100644 --- a/include/hw/ssi/aspeed_smc.h +++ b/include/hw/ssi/aspeed_smc.h @@ -42,7 +42,8 @@ typedef struct AspeedSMCController { uint8_t conf_enable_w0; uint8_t max_slaves; const AspeedSegments *segments; - uint32_t mapping_window_size; + hwaddr flash_window_base; + uint32_t flash_window_size; } AspeedSMCController; typedef struct AspeedSMCFlash { -- cgit v1.1 From dbcabeeb54e9101307cf6225b9311a3ceaab7d1a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 17 Oct 2016 19:22:16 +0100 Subject: aspeed: extend the number of host SPI controllers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The AST2500 SoC has two. Let's prepare ground for the next changes which will add the required definitions for the second host SPI controller. Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery Message-id: 1474977462-28032-4-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- include/hw/arm/aspeed_soc.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 7359e25..f26a9f0 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -20,6 +20,8 @@ #include "hw/i2c/aspeed_i2c.h" #include "hw/ssi/aspeed_smc.h" +#define ASPEED_SPIS_NUM 2 + typedef struct AspeedSoCState { /*< private >*/ DeviceState parent; @@ -32,7 +34,7 @@ typedef struct AspeedSoCState { AspeedI2CState i2c; AspeedSCUState scu; AspeedSMCState fmc; - AspeedSMCState spi; + AspeedSMCState spi[ASPEED_SPIS_NUM]; AspeedSDMCState sdmc; } AspeedSoCState; @@ -44,6 +46,8 @@ typedef struct AspeedSoCInfo { const char *cpu_model; uint32_t silicon_rev; hwaddr sdram_base; + int spis_num; + const hwaddr *spi_bases; } AspeedSoCInfo; typedef struct AspeedSoCClass { -- cgit v1.1 From 6dc52326ccbb826c3b61aa1429001a79d34be1e3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 17 Oct 2016 19:22:16 +0100 Subject: aspeed: add support for the AST2500 SoC SMC controllers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The SMC controllers on the Aspeed AST2500 SoC are very similar to the ones found on the AST2400. The differences are on the number of supported flash modules and their default mappings in the SoC address space. The Aspeed AST2500 has one SPI controller for the BMC firmware and two for the host firmware. All controllers have now the same set of registers compatible with the AST2400 FMC controller and the legacy 'SMC' controller is fully gone. We keep the FMC object to act as the BMC SPI controller and add a new SPI controller for the host. We also have to introduce new type names to handle the differences in the flash modules memory mappping. Signed-off-by: Cédric Le Goater Reviewed-by: Andrew Jeffery Message-id: 1474977462-28032-5-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- include/hw/arm/aspeed_soc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index f26a9f0..5406b49 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -48,6 +48,8 @@ typedef struct AspeedSoCInfo { hwaddr sdram_base; int spis_num; const hwaddr *spi_bases; + const char *fmc_typename; + const char **spi_typename; } AspeedSoCInfo; typedef struct AspeedSoCClass { -- cgit v1.1 From 2231f69b4e4523c43aa459cab18ab77c0e29b4d1 Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Mon, 17 Oct 2016 19:22:17 +0100 Subject: hw/arm/virt: no ITS on older machine types We should avoid exposing new hardware (through DT and ACPI) on older machine types. This patch keeps 2.7 and older from changing, despite the introduction of ITS support for 2.8. Signed-off-by: Andrew Jones Reviewed-by: Eric Auger Message-id: 1476117341-32690-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell --- include/hw/arm/virt-acpi-build.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/arm/virt-acpi-build.h b/include/hw/arm/virt-acpi-build.h index e43330a..f5ec749 100644 --- a/include/hw/arm/virt-acpi-build.h +++ b/include/hw/arm/virt-acpi-build.h @@ -33,6 +33,7 @@ typedef struct VirtGuestInfo { const int *irqmap; bool use_highmem; int gic_version; + bool no_its; } VirtGuestInfo; -- cgit v1.1