From 27c22b2de08f71500df581563cc9d22638a14b4d Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 28 Oct 2020 13:30:08 +0800 Subject: hw/riscv: microchip_pfsoc: Map the reserved memory at address 0 Somehow HSS needs to access address 0 [1] for the DDR calibration data which is in the chipset's reserved memory. Let's map it. [1] See the config_copy() calls in various places in ddr_setup() in the HSS source codes. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 1603863010-15807-9-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis --- include/hw/riscv/microchip_pfsoc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/hw/riscv/microchip_pfsoc.h b/include/hw/riscv/microchip_pfsoc.h index 245c82d..f34a6b3 100644 --- a/include/hw/riscv/microchip_pfsoc.h +++ b/include/hw/riscv/microchip_pfsoc.h @@ -74,6 +74,7 @@ typedef struct MicrochipIcicleKitState { TYPE_MICROCHIP_ICICLE_KIT_MACHINE) enum { + MICROCHIP_PFSOC_RSVD0, MICROCHIP_PFSOC_DEBUG, MICROCHIP_PFSOC_E51_DTIM, MICROCHIP_PFSOC_BUSERR_UNIT0, -- cgit v1.1