From dfc973ecc1e8a2c148c0011be89c012891f72384 Mon Sep 17 00:00:00 2001 From: Vitaly Wool Date: Thu, 12 Nov 2020 09:49:51 +0200 Subject: hw/riscv: microchip_pfsoc: add QSPI NOR flash Add QSPI NOR flash definition for Microchip PolarFire SoC. Signed-off-by: Vitaly Wool Acked-by: Alistair Francis Reviewed-by: Bin Meng Message-id: 20201112074950.33283-1-vitaly.wool@konsulko.com Signed-off-by: Alistair Francis --- include/hw/riscv/microchip_pfsoc.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/hw') diff --git a/include/hw/riscv/microchip_pfsoc.h b/include/hw/riscv/microchip_pfsoc.h index 51d4463..d0c666a 100644 --- a/include/hw/riscv/microchip_pfsoc.h +++ b/include/hw/riscv/microchip_pfsoc.h @@ -97,6 +97,8 @@ enum { MICROCHIP_PFSOC_MMUART2, MICROCHIP_PFSOC_MMUART3, MICROCHIP_PFSOC_MMUART4, + MICROCHIP_PFSOC_SPI0, + MICROCHIP_PFSOC_SPI1, MICROCHIP_PFSOC_I2C1, MICROCHIP_PFSOC_GEM0, MICROCHIP_PFSOC_GEM1, @@ -105,6 +107,7 @@ enum { MICROCHIP_PFSOC_GPIO2, MICROCHIP_PFSOC_ENVM_CFG, MICROCHIP_PFSOC_ENVM_DATA, + MICROCHIP_PFSOC_QSPI_XIP, MICROCHIP_PFSOC_IOSCB, MICROCHIP_PFSOC_DRAM_LO, MICROCHIP_PFSOC_DRAM_LO_ALIAS, -- cgit v1.1