From 77599a696df748e89b8f6610fe8dafaa6986729d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 9 Feb 2024 08:46:16 +0100 Subject: hw/misc/mips: Reduce itc_reconfigure() scope MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previous commit removed the MT*C0(SAAR) helpers which were the only calls to itc_reconfigure() out of hw/, we can reduce its scope and declare it statically. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240209090513.9401-3-philmd@linaro.org> --- include/hw/misc/mips_itu.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/hw') diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index 5caed6c..3a7330a 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -79,6 +79,4 @@ struct MIPSITUState { /* Get ITC Configuration Tag memory region. */ MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); -void itc_reconfigure(struct MIPSITUState *tag); - #endif /* MIPS_ITU_H */ -- cgit v1.1 From b8db6be27b2a31ec34640bc7812c4c7b691e71be Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 9 Feb 2024 08:50:27 +0100 Subject: hw/misc/mips_itu: Remove MIPSITUState::cpu0 field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since previous commit the MIPSITUState::cpu0 field is not used anymore. Remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240209090513.9401-6-philmd@linaro.org> --- include/hw/misc/mips_itu.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index 3a7330a..de7400c 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -73,7 +73,6 @@ struct MIPSITUState { /* SAAR */ uint64_t *saar; - ArchCPU *cpu0; }; /* Get ITC Configuration Tag memory region. */ -- cgit v1.1 From 48e06b647155cc10ee8cc62fd1a70d8812eec850 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 9 Feb 2024 08:51:53 +0100 Subject: hw/misc/mips_itu: Remove MIPSITUState::saar field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This field is not set. Remove it along with the dead code it was guarding. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240209090513.9401-7-philmd@linaro.org> --- include/hw/misc/mips_itu.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include/hw') diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h index de7400c..27c9a10 100644 --- a/include/hw/misc/mips_itu.h +++ b/include/hw/misc/mips_itu.h @@ -70,9 +70,6 @@ struct MIPSITUState { /* ITU Control Register */ uint64_t icr0; - - /* SAAR */ - uint64_t *saar; }; /* Get ITC Configuration Tag memory region. */ -- cgit v1.1 From 7188dfcda239ff2460fe8b0994e22e4b3a21dc17 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 7 Feb 2024 16:25:28 +0100 Subject: hw/rx/rx62n: Reduce inclusion of 'qemu/units.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "qemu/units.h" is not used in the "hw/rx/rx62n.h" header, include it in the source where it is. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Yoshinori Sato Reviewed-by: Richard Henderson Message-Id: <20240213130341.1793-3-philmd@linaro.org> --- include/hw/rx/rx62n.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h index 73ceeb5..bcda583 100644 --- a/include/hw/rx/rx62n.h +++ b/include/hw/rx/rx62n.h @@ -29,7 +29,6 @@ #include "hw/timer/renesas_tmr.h" #include "hw/timer/renesas_cmt.h" #include "hw/char/renesas_sci.h" -#include "qemu/units.h" #include "qom/object.h" #define TYPE_RX62N_MCU "rx62n-mcu" -- cgit v1.1 From 2e0b925a341ddaa4be577542c74aa19b992215c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 7 Feb 2024 16:26:12 +0100 Subject: hw/rx/rx62n: Only call qdev_get_gpio_in() when necessary MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of filling an array of all the possible IRQs, only call qdev_get_gpio_in() when an IRQ is used. Remove the array from RX62NState. Doing so we avoid calling qdev_get_gpio_in() on an unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Reviewed-by: Yoshinori Sato Reviewed-by: Richard Henderson Message-Id: <20240213130341.1793-4-philmd@linaro.org> --- include/hw/rx/rx62n.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/rx/rx62n.h b/include/hw/rx/rx62n.h index bcda583..766fe0e 100644 --- a/include/hw/rx/rx62n.h +++ b/include/hw/rx/rx62n.h @@ -67,7 +67,6 @@ struct RX62NState { MemoryRegion iomem2; MemoryRegion iomem3; MemoryRegion c_flash; - qemu_irq irq[NR_IRQS]; /* Input Clock (XTAL) frequency */ uint32_t xtal_freq_hz; -- cgit v1.1 From 5e37bc4997c32a1c9a6621a060462c84df9f1b8f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 12:42:14 +0100 Subject: hw/dma: Pass parent object to i8257_dma_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set I8257 instances parent (migration isn't affected). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240213114426.87836-1-philmd@linaro.org> --- include/hw/dma/i8257.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h index f652345..4342e4a 100644 --- a/include/hw/dma/i8257.h +++ b/include/hw/dma/i8257.h @@ -45,6 +45,6 @@ struct I8257State { PortioList portio_pageh; }; -void i8257_dma_init(ISABus *bus, bool high_page_enable); +void i8257_dma_init(Object *parent, ISABus *bus, bool high_page_enable); #endif -- cgit v1.1 From f432962e72de4d820b11294ae3e51f2aa5643265 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:39 +0100 Subject: hw/sparc/grlib: split out the headers for each peripherals MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Split out the headers for each peripherals and move them in their right hardware directory. Update Copyright and add SPDX-License-Identifier at the same time. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-2-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/char/grlib_uart.h | 32 ++++++++++++++++++++++++++++ include/hw/intc/grlib_irqmp.h | 41 ++++++++++++++++++++++++++++++++++++ include/hw/sparc/grlib.h | 45 ---------------------------------------- include/hw/timer/grlib_gptimer.h | 32 ++++++++++++++++++++++++++++ 4 files changed, 105 insertions(+), 45 deletions(-) create mode 100644 include/hw/char/grlib_uart.h create mode 100644 include/hw/intc/grlib_irqmp.h delete mode 100644 include/hw/sparc/grlib.h create mode 100644 include/hw/timer/grlib_gptimer.h (limited to 'include/hw') diff --git a/include/hw/char/grlib_uart.h b/include/hw/char/grlib_uart.h new file mode 100644 index 0000000..7496f8f --- /dev/null +++ b/include/hw/char/grlib_uart.h @@ -0,0 +1,32 @@ +/* + * QEMU GRLIB UART + * + * SPDX-License-Identifier: MIT + * + * Copyright (c) 2024 AdaCore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef GRLIB_UART_H +#define GRLIB_UART_H + +#define TYPE_GRLIB_APB_UART "grlib-apbuart" + +#endif diff --git a/include/hw/intc/grlib_irqmp.h b/include/hw/intc/grlib_irqmp.h new file mode 100644 index 0000000..c5a90cb --- /dev/null +++ b/include/hw/intc/grlib_irqmp.h @@ -0,0 +1,41 @@ +/* + * QEMU GRLIB Components + * + * SPDX-License-Identifier: MIT + * + * Copyright (c) 2010-2024 AdaCore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef GRLIB_IRQMP_H +#define GRLIB_IRQMP_H + +#include "hw/sysbus.h" + +/* Emulation of GrLib device is base on the GRLIB IP Core User's Manual: + * http://www.gaisler.com/products/grlib/grip.pdf + */ + +/* IRQMP */ +#define TYPE_GRLIB_IRQMP "grlib-irqmp" + +void grlib_irqmp_ack(DeviceState *dev, int intno); + +#endif /* GRLIB_IRQMP_H */ diff --git a/include/hw/sparc/grlib.h b/include/hw/sparc/grlib.h deleted file mode 100644 index ef1946c..0000000 --- a/include/hw/sparc/grlib.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * QEMU GRLIB Components - * - * Copyright (c) 2010-2019 AdaCore - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef GRLIB_H -#define GRLIB_H - -#include "hw/sysbus.h" - -/* Emulation of GrLib device is base on the GRLIB IP Core User's Manual: - * http://www.gaisler.com/products/grlib/grip.pdf - */ - -/* IRQMP */ -#define TYPE_GRLIB_IRQMP "grlib-irqmp" - -void grlib_irqmp_ack(DeviceState *dev, int intno); - -/* GPTimer */ -#define TYPE_GRLIB_GPTIMER "grlib-gptimer" - -/* APB UART */ -#define TYPE_GRLIB_APB_UART "grlib-apbuart" - -#endif /* GRLIB_H */ diff --git a/include/hw/timer/grlib_gptimer.h b/include/hw/timer/grlib_gptimer.h new file mode 100644 index 0000000..e56f1b8 --- /dev/null +++ b/include/hw/timer/grlib_gptimer.h @@ -0,0 +1,32 @@ +/* + * QEMU GRLIB GPTimer + * + * SPDX-License-Identifier: MIT + * + * Copyright (c) 2024 AdaCore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef GRLIB_GPTIMER_H +#define GRLIB_GPTIMER_H + +#define TYPE_GRLIB_GPTIMER "grlib-gptimer" + +#endif -- cgit v1.1 From 0fa5cd4a6016c0dc13c2882f63b58787cf3283bb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Wed, 31 Jan 2024 09:50:42 +0100 Subject: hw/intc/grlib_irqmp: implements multicore irq MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now there is an ncpus property, use it in order to deliver the IRQ to multiple CPU. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240131085047.18458-5-chigot@adacore.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/grlib_irqmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/intc/grlib_irqmp.h b/include/hw/intc/grlib_irqmp.h index c5a90cb..a76acbf 100644 --- a/include/hw/intc/grlib_irqmp.h +++ b/include/hw/intc/grlib_irqmp.h @@ -36,6 +36,6 @@ /* IRQMP */ #define TYPE_GRLIB_IRQMP "grlib-irqmp" -void grlib_irqmp_ack(DeviceState *dev, int intno); +void grlib_irqmp_ack(DeviceState *dev, unsigned int cpu, int intno); #endif /* GRLIB_IRQMP_H */ -- cgit v1.1 From d407be0877d8397218c6b79e5ad8b25267f6f5f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 08:20:43 +0100 Subject: hw/ide/ahci: Expose AHCIPCIState structure MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In order to be able to QOM-embed a structure, we need its full definition. Move it from "ahci_internal.h" to the new "hw/ide/ahci-pci.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20240213081201.78951-3-philmd@linaro.org> --- include/hw/ide/ahci-pci.h | 22 ++++++++++++++++++++++ include/hw/ide/ahci.h | 3 --- 2 files changed, 22 insertions(+), 3 deletions(-) create mode 100644 include/hw/ide/ahci-pci.h (limited to 'include/hw') diff --git a/include/hw/ide/ahci-pci.h b/include/hw/ide/ahci-pci.h new file mode 100644 index 0000000..c2ee616 --- /dev/null +++ b/include/hw/ide/ahci-pci.h @@ -0,0 +1,22 @@ +/* + * QEMU AHCI Emulation (PCI devices) + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_IDE_AHCI_PCI_H +#define HW_IDE_AHCI_PCI_H + +#include "qom/object.h" +#include "hw/ide/ahci.h" +#include "hw/pci/pci_device.h" + +#define TYPE_ICH9_AHCI "ich9-ahci" +OBJECT_DECLARE_SIMPLE_TYPE(AHCIPCIState, ICH9_AHCI) + +struct AHCIPCIState { + PCIDevice parent_obj; + + AHCIState ahci; +}; + +#endif diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 210e5e7..6818d02 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -52,9 +52,6 @@ typedef struct AHCIState { } AHCIState; -#define TYPE_ICH9_AHCI "ich9-ahci" -OBJECT_DECLARE_SIMPLE_TYPE(AHCIPCIState, ICH9_AHCI) - int32_t ahci_get_num_ports(PCIDevice *dev); void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); -- cgit v1.1 From e6097f186416df368a7f87a37f0a7fd25de587ba Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 08:31:45 +0100 Subject: hw/ide/ahci: Inline ahci_get_num_ports() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Introduce the 'ich9' variable and inline ahci_get_num_ports(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20240213081201.78951-5-philmd@linaro.org> --- include/hw/ide/ahci.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 6818d02..dbef377 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -52,7 +52,6 @@ typedef struct AHCIState { } AHCIState; -int32_t ahci_get_num_ports(PCIDevice *dev); void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); #define TYPE_SYSBUS_AHCI "sysbus-ahci" -- cgit v1.1 From e2f8d28005acdfa4e7edd6c842c6e9527a901ba5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 08:34:27 +0100 Subject: hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since ahci_ide_create_devs() is not PCI specific, pass it an AHCIState argument instead of PCIDevice. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20240213081201.78951-6-philmd@linaro.org> --- include/hw/ide/ahci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index dbef377..8cd55b1 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -52,7 +52,7 @@ typedef struct AHCIState { } AHCIState; -void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); +void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd); #define TYPE_SYSBUS_AHCI "sysbus-ahci" OBJECT_DECLARE_SIMPLE_TYPE(SysbusAHCIState, SYSBUS_AHCI) -- cgit v1.1 From 44c11b2e69d845e487d0184079899ef15ab626a5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 06:29:00 +0100 Subject: hw/ide/ahci: Convert AHCIState::ports to unsigned MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit AHCIState::ports should be unsigned. Besides, we never check it for negative value. It is unlikely it was ever used with more than INT32_MAX ports, so it is safe to convert it to unsigned. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20240213081201.78951-7-philmd@linaro.org> --- include/hw/ide/ahci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 8cd55b1..604d3a0 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -46,7 +46,7 @@ typedef struct AHCIState { MemoryRegion idp; /* Index-Data Pair I/O port space */ unsigned idp_offset; /* Offset of index in I/O port space */ uint32_t idp_index; /* Current IDP index */ - int32_t ports; + uint32_t ports; qemu_irq irq; AddressSpace *as; } AHCIState; -- cgit v1.1 From b0bccc6a9af57d6adb73041e94d7cd5b1554fc0b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 06:26:06 +0100 Subject: hw/ide/ahci: Remove SysbusAHCIState::num_ports field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No need to duplicate AHCIState::ports, directly access it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Message-Id: <20240213081201.78951-9-philmd@linaro.org> --- include/hw/ide/ahci.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 604d3a0..c0b10c2 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -63,7 +63,6 @@ struct SysbusAHCIState { /*< public >*/ AHCIState ahci; - uint32_t num_ports; }; #define TYPE_ALLWINNER_AHCI "allwinner-ahci" -- cgit v1.1 From fbb5945e859301e375fb919cb72b86b06116b998 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 13 Feb 2024 06:15:13 +0100 Subject: hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h' MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Keep "hw/ide/ahci.h" AHCI-generic. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Leif Lindholm Reviewed-by: Michael S. Tsirkin Message-Id: <20240213081201.78951-10-philmd@linaro.org> --- include/hw/arm/allwinner-a10.h | 2 +- include/hw/arm/allwinner-r40.h | 2 +- include/hw/arm/xlnx-zynqmp.h | 2 +- include/hw/ide/ahci-sysbus.h | 35 +++++++++++++++++++++++++++++++++++ include/hw/ide/ahci.h | 29 +---------------------------- 5 files changed, 39 insertions(+), 31 deletions(-) create mode 100644 include/hw/ide/ahci-sysbus.h (limited to 'include/hw') diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h index 2eb83a1..67a9a17 100644 --- a/include/hw/arm/allwinner-a10.h +++ b/include/hw/arm/allwinner-a10.h @@ -5,7 +5,7 @@ #include "hw/intc/allwinner-a10-pic.h" #include "hw/net/allwinner_emac.h" #include "hw/sd/allwinner-sdhost.h" -#include "hw/ide/ahci.h" +#include "hw/ide/ahci-sysbus.h" #include "hw/usb/hcd-ohci.h" #include "hw/usb/hcd-ehci.h" #include "hw/rtc/allwinner-rtc.h" diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h index 66c38e7..614e74b 100644 --- a/include/hw/arm/allwinner-r40.h +++ b/include/hw/arm/allwinner-r40.h @@ -22,7 +22,7 @@ #include "qom/object.h" #include "hw/timer/allwinner-a10-pit.h" -#include "hw/ide/ahci.h" +#include "hw/ide/ahci-sysbus.h" #include "hw/intc/arm_gic.h" #include "hw/sd/allwinner-sdhost.h" #include "hw/misc/allwinner-r40-ccu.h" diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 96358d5..48f7948 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -22,7 +22,7 @@ #include "hw/net/cadence_gem.h" #include "hw/char/cadence_uart.h" #include "hw/net/xlnx-zynqmp-can.h" -#include "hw/ide/ahci.h" +#include "hw/ide/ahci-sysbus.h" #include "hw/sd/sdhci.h" #include "hw/ssi/xilinx_spips.h" #include "hw/dma/xlnx_dpdma.h" diff --git a/include/hw/ide/ahci-sysbus.h b/include/hw/ide/ahci-sysbus.h new file mode 100644 index 0000000..06eaac8 --- /dev/null +++ b/include/hw/ide/ahci-sysbus.h @@ -0,0 +1,35 @@ +/* + * QEMU AHCI Emulation (MMIO-mapped devices) + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef HW_IDE_AHCI_SYSBUS_H +#define HW_IDE_AHCI_SYSBUS_H + +#include "qom/object.h" +#include "hw/sysbus.h" +#include "hw/ide/ahci.h" + +#define TYPE_SYSBUS_AHCI "sysbus-ahci" +OBJECT_DECLARE_SIMPLE_TYPE(SysbusAHCIState, SYSBUS_AHCI) + +struct SysbusAHCIState { + SysBusDevice parent_obj; + + AHCIState ahci; +}; + +#define TYPE_ALLWINNER_AHCI "allwinner-ahci" +OBJECT_DECLARE_SIMPLE_TYPE(AllwinnerAHCIState, ALLWINNER_AHCI) + +#define ALLWINNER_AHCI_MMIO_OFF 0x80 +#define ALLWINNER_AHCI_MMIO_SIZE 0x80 + +struct AllwinnerAHCIState { + SysbusAHCIState parent_obj; + + MemoryRegion mmio; + uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE / 4]; +}; + +#endif diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index c0b10c2..ba31e75 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -24,8 +24,7 @@ #ifndef HW_IDE_AHCI_H #define HW_IDE_AHCI_H -#include "hw/sysbus.h" -#include "qom/object.h" +#include "exec/memory.h" typedef struct AHCIDevice AHCIDevice; @@ -54,30 +53,4 @@ typedef struct AHCIState { void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd); -#define TYPE_SYSBUS_AHCI "sysbus-ahci" -OBJECT_DECLARE_SIMPLE_TYPE(SysbusAHCIState, SYSBUS_AHCI) - -struct SysbusAHCIState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - AHCIState ahci; -}; - -#define TYPE_ALLWINNER_AHCI "allwinner-ahci" -OBJECT_DECLARE_SIMPLE_TYPE(AllwinnerAHCIState, ALLWINNER_AHCI) - -#define ALLWINNER_AHCI_MMIO_OFF 0x80 -#define ALLWINNER_AHCI_MMIO_SIZE 0x80 - -struct AllwinnerAHCIState { - /*< private >*/ - SysbusAHCIState parent_obj; - /*< public >*/ - - MemoryRegion mmio; - uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4]; -}; - #endif /* HW_IDE_AHCI_H */ -- cgit v1.1