From d5aaa1b0456033fc9ff723ac881ebe1b61360cca Mon Sep 17 00:00:00 2001 From: Gerd Hoffmann Date: Wed, 3 Jun 2015 14:47:19 +0200 Subject: virtio: 64bit features fixups. Commit "019a3ed virtio: make features 64bit wide" missed a few changes, as I've noticed while trying to rebase the virtio-1 branch to latest master. This patch adds them. Signed-off-by: Gerd Hoffmann Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/virtio/virtio.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include/hw') diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index 7222a90..2bb7c1a 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/virtio/virtio.h @@ -98,7 +98,7 @@ typedef struct VirtioDeviceClass { DeviceUnrealize unrealize; uint64_t (*get_features)(VirtIODevice *vdev, uint64_t requested_features); uint64_t (*bad_features)(VirtIODevice *vdev); - void (*set_features)(VirtIODevice *vdev, uint32_t val); + void (*set_features)(VirtIODevice *vdev, uint64_t val); void (*get_config)(VirtIODevice *vdev, uint8_t *config); void (*set_config)(VirtIODevice *vdev, const uint8_t *config); void (*reset)(VirtIODevice *vdev); @@ -184,7 +184,7 @@ void virtio_queue_set_vector(VirtIODevice *vdev, int n, uint16_t vector); void virtio_set_status(VirtIODevice *vdev, uint8_t val); void virtio_reset(void *opaque); void virtio_update_irq(VirtIODevice *vdev); -int virtio_set_features(VirtIODevice *vdev, uint32_t val); +int virtio_set_features(VirtIODevice *vdev, uint64_t val); /* Base devices. */ typedef struct VirtIOBlkConf VirtIOBlkConf; @@ -230,19 +230,19 @@ VirtQueue *virtio_vector_next_queue(VirtQueue *vq); static inline void virtio_add_feature(uint64_t *features, unsigned int fbit) { assert(fbit < 64); - *features |= (1 << fbit); + *features |= (1ULL << fbit); } static inline void virtio_clear_feature(uint64_t *features, unsigned int fbit) { assert(fbit < 64); - *features &= ~(1 << fbit); + *features &= ~(1ULL << fbit); } static inline bool __virtio_has_feature(uint64_t features, unsigned int fbit) { assert(fbit < 64); - return !!(features & (1 << fbit)); + return !!(features & (1ULL << fbit)); } static inline bool virtio_has_feature(VirtIODevice *vdev, unsigned int fbit) -- cgit v1.1 From ca9b46bcecc0f06882eec1b152b71f93a066da79 Mon Sep 17 00:00:00 2001 From: Zhu Guihua Date: Wed, 13 May 2015 17:21:36 +0800 Subject: acpi: add acpi_send_gpe_event() to rise sci for hotplug Add a new API named acpi_send_gpe_event() to send hotplug SCI. This API can be used by pci, cpu and memory hotplug. This patch is rebased on master. Signed-off-by: Zhu Guihua Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Igor Mammedov --- include/hw/acpi/acpi.h | 10 ++++++++++ include/hw/acpi/memory_hotplug.h | 2 -- include/hw/acpi/pc-hotplug.h | 1 - 3 files changed, 10 insertions(+), 3 deletions(-) (limited to 'include/hw') diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index 1f678b4..9390997 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -91,6 +91,13 @@ /* PM2_CNT */ #define ACPI_BITMASK_ARB_DISABLE 0x0001 +/* These values are part of guest ABI, and can not be changed */ +typedef enum { + ACPI_PCI_HOTPLUG_STATUS = 2, + ACPI_CPU_HOTPLUG_STATUS = 4, + ACPI_MEMORY_HOTPLUG_STATUS = 8, +} AcpiGPEStatusBits; + /* structs */ typedef struct ACPIPMTimer ACPIPMTimer; typedef struct ACPIPM1EVT ACPIPM1EVT; @@ -172,6 +179,9 @@ void acpi_gpe_reset(ACPIREGS *ar); void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val); uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr); +void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq, + AcpiGPEStatusBits status); + void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq); /* acpi.c */ diff --git a/include/hw/acpi/memory_hotplug.h b/include/hw/acpi/memory_hotplug.h index 986223b..1342adb 100644 --- a/include/hw/acpi/memory_hotplug.h +++ b/include/hw/acpi/memory_hotplug.h @@ -5,8 +5,6 @@ #include "hw/acpi/acpi.h" #include "migration/vmstate.h" -#define ACPI_MEMORY_HOTPLUG_STATUS 8 - /** * MemStatus: * @is_removing: the memory device in slot has been requested to be ejected. diff --git a/include/hw/acpi/pc-hotplug.h b/include/hw/acpi/pc-hotplug.h index 0513c1c..77b1569 100644 --- a/include/hw/acpi/pc-hotplug.h +++ b/include/hw/acpi/pc-hotplug.h @@ -16,7 +16,6 @@ * ONLY DEFINEs are permited in this file since it's shared * between C and ASL code. */ -#define ACPI_CPU_HOTPLUG_STATUS 4 /* Limit for CPU arch IDs for CPU hotplug. All hotpluggable CPUs should * have CPUClass.get_arch_id() < ACPI_CPU_HOTPLUG_ID_LIMIT. -- cgit v1.1 From ce6a28ee057da3e4a587dada369e33a8486b0066 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Tue, 2 Jun 2015 14:22:57 +0300 Subject: hw/pci: made pci_bus_is_root a PCIBusClass method Refactoring it as a method of PCIBusClass will allow different implementations for subclasses. Removed the assumption that the root bus does not have a parent device because is specific only to the default class implementation. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Acked-by: Laszlo Ersek --- include/hw/pci/pci.h | 2 ++ include/hw/pci/pci_bus.h | 8 ++++++++ 2 files changed, 10 insertions(+) (limited to 'include/hw') diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 5d050c8..df05c96 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -340,6 +340,8 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin); #define TYPE_PCI_BUS "PCI" #define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS) +#define PCI_BUS_CLASS(klass) OBJECT_CLASS_CHECK(PCIBusClass, (klass), TYPE_PCI_BUS) +#define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_PCI_BUS) #define TYPE_PCIE_BUS "PCIE" bool pci_bus_is_express(PCIBus *bus); diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index fabaeee..b5ba9c4 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -8,6 +8,14 @@ * use accessor functions in pci.h, pci_bridge.h */ +typedef struct PCIBusClass { + /*< private >*/ + BusClass parent_class; + /*< public >*/ + + bool (*is_root)(PCIBus *bus); +} PCIBusClass; + struct PCIBus { BusState qbus; PCIIOMMUFunc iommu_fn; -- cgit v1.1 From 602141d9974d726063907851528c89d617730156 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Tue, 2 Jun 2015 14:22:58 +0300 Subject: hw/pci: made pci_bus_num a PCIBusClass method Refactoring it as a method of PCIBusClass will allow different implementations for subclasses. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Acked-by: Laszlo Ersek --- include/hw/pci/pci_bus.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/hw') diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index b5ba9c4..7b9939e 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -14,6 +14,7 @@ typedef struct PCIBusClass { /*< public >*/ bool (*is_root)(PCIBus *bus); + int (*bus_num)(PCIBus *bus); } PCIBusClass; struct PCIBus { -- cgit v1.1 From 40d14bef8012087ade60f254487d31db822a1a44 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Tue, 2 Jun 2015 14:23:06 +0300 Subject: hw/pci: introduce PCI Expander Bridge (PXB) PXB is a "light-weight" host bridge whose purpose is to enable the main host bridge to support multiple PCI root buses for pc machines. As oposed to PCI-2-PCI bridge's secondary bus, PXB's bus is a primary bus and can be associated with a NUMA node (different from the main host bridge) allowing the guest OS to recognize the proximity of a pass-through device to other resources as RAM and CPUs. The PXB is composed from: - A primary PCI bus (can be associated with a NUMA node) Acts like a normal pci bus and from the functionality point of view is an "expansion" of the bus behind the main host bridge. - A pci-2-pci bridge behind the primary PCI bus where the actual devices will be attached. - A host-bridge PCI device Situated on the bus behind the main host bridge, allows the BIOS to configure the bus number and IO/mem resources. It does not have its own config/data register for configuration cycles, this being handled by the main host bridge. - A host-bridge sysbus to comply with QEMU current design. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Acked-by: Laszlo Ersek --- include/hw/pci/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/hw') diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index df05c96..7940700 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -91,6 +91,7 @@ #define PCI_DEVICE_ID_REDHAT_ROCKER 0x0006 #define PCI_DEVICE_ID_REDHAT_SDHCI 0x0007 #define PCI_DEVICE_ID_REDHAT_PCIE_HOST 0x0008 +#define PCI_DEVICE_ID_REDHAT_PXB 0x0009 #define PCI_DEVICE_ID_REDHAT_QXL 0x0100 #define FMT_PCIBUS PRIx64 -- cgit v1.1 From 6a3042b23bbb1fa92c00ea9267c830e7f2e99313 Mon Sep 17 00:00:00 2001 From: Marcel Apfelbaum Date: Tue, 2 Jun 2015 14:23:09 +0300 Subject: hw/pci: add support for NUMA nodes PCI root buses can be attached to a specific NUMA node. PCI buses are not attached by default to a NUMA node. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Acked-by: Laszlo Ersek --- include/hw/pci/pci.h | 1 + include/hw/pci/pci_bus.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include/hw') diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 7940700..c2a427f 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -382,6 +382,7 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus, PCIDevice *pci_vga_init(PCIBus *bus); int pci_bus_num(PCIBus *s); +int pci_bus_numa_node(PCIBus *bus); void pci_for_each_device(PCIBus *bus, int bus_num, void (*fn)(PCIBus *bus, PCIDevice *d, void *opaque), void *opaque); diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index 7b9939e..403fec6 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -15,6 +15,7 @@ typedef struct PCIBusClass { bool (*is_root)(PCIBus *bus); int (*bus_num)(PCIBus *bus); + uint16_t (*numa_node)(PCIBus *bus); } PCIBusClass; struct PCIBus { -- cgit v1.1 From 9a10bbb4e83b184faef6fa744396a6775283c0aa Mon Sep 17 00:00:00 2001 From: Laszlo Ersek Date: Wed, 29 Apr 2015 15:20:14 +0200 Subject: hw/acpi: acpi_pm1_cnt_init(): take "disable_s3" and "disable_s4" This patch only modifies the function prototype and updates all chipset code that calls acpi_pm1_cnt_init() to pass in their own disable_s3 and disable_s4 settings. vt82c686 is assumed to be fixed "S3 and S4 enabled". RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=1204696 Cc: Amit Shah Cc: "Michael S. Tsirkin" Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Cc: Aurelien Jarno Cc: Leon Alrae Signed-off-by: Laszlo Ersek Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Signed-off-by: Laszlo Ersek --- include/hw/acpi/acpi.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index 9390997..b20bd55 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -167,7 +167,8 @@ void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, MemoryRegion *parent); /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */ -void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val); +void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, + bool disable_s3, bool disable_s4, uint8_t s4_val); void acpi_pm1_cnt_update(ACPIREGS *ar, bool sci_enable, bool sci_disable); void acpi_pm1_cnt_reset(ACPIREGS *ar); -- cgit v1.1 From 6e7d82497dc8da7d420c8fa6632d759e08a18bc3 Mon Sep 17 00:00:00 2001 From: Laszlo Ersek Date: Wed, 29 Apr 2015 15:20:16 +0200 Subject: hw/acpi: piix4_pm_init(): take fw_cfg object no more This PIIX4 init function has no more reason to receive a pointer to the FwCfg object. Remove the parameter from the prototype, and update callers. As a result, the pc_init1() function no longer needs to save the return value of pc_memory_init() and xen_load_linux(), which makes it more similar to pc_q35_init(). The return type & value of pc_memory_init() and xen_load_linux() are not changed themselves; maybe we'll need their return values sometime later. RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=1204696 Cc: Amit Shah Cc: "Michael S. Tsirkin" Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Cc: Aurelien Jarno Cc: Leon Alrae Signed-off-by: Laszlo Ersek Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Signed-off-by: Laszlo Ersek --- include/hw/i386/pc.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include/hw') diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 27bd748..0d501c9 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -218,8 +218,7 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, - int kvm_enabled, FWCfgState *fw_cfg, - DeviceState **piix4_pm); + int kvm_enabled, DeviceState **piix4_pm); void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); /* hpet.c */ -- cgit v1.1 From 309750fad51f17d1ec6195c5d8ad7d741596ddb6 Mon Sep 17 00:00:00 2001 From: Jason Wang Date: Thu, 4 Jun 2015 05:28:46 -0400 Subject: vhost: logs sharing Currently we allocate one vhost log per vhost device. This is sub optimal when: - Guest has several device with vhost as backend - Guest has multiqueue devices In the above cases, we can avoid the memory allocation by sharing a single vhost log among all the vhost devices. This is done through: - Introducing a new vhost_log structure with refcnt inside. - Using a global pointer to vhost_log structure that will be used. And introduce helper to get the log with expected log size and helper to - drop the refcnt to the old log. - Each vhost device still keep track of a pointer to the log that was used. With above, if no resize happens, all vhost device will share a single vhost log. During resize, a new vhost_log structure will be allocated and made for the global pointer. And each vhost devices will drop the refcnt to the old log. Tested by doing scp during migration for a 2 queues virtio-net-pci. Cc: Michael S. Tsirkin Signed-off-by: Jason Wang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/virtio/vhost.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include/hw') diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h index 8f04888..816a2e8 100644 --- a/include/hw/virtio/vhost.h +++ b/include/hw/virtio/vhost.h @@ -28,6 +28,12 @@ typedef unsigned long vhost_log_chunk_t; #define VHOST_LOG_CHUNK (VHOST_LOG_PAGE * VHOST_LOG_BITS) #define VHOST_INVALID_FEATURE_BIT (0xff) +struct vhost_log { + unsigned long long size; + int refcnt; + vhost_log_chunk_t log[0]; +}; + struct vhost_memory; struct vhost_dev { MemoryListener memory_listener; @@ -43,7 +49,6 @@ struct vhost_dev { unsigned long long backend_features; bool started; bool log_enabled; - vhost_log_chunk_t *log; unsigned long long log_size; Error *migration_blocker; bool force; @@ -52,6 +57,7 @@ struct vhost_dev { hwaddr mem_changed_end_addr; const VhostOps *vhost_ops; void *opaque; + struct vhost_log *log; }; int vhost_dev_init(struct vhost_dev *hdev, void *opaque, -- cgit v1.1