From c52c266d24b10f1482602e6d22938d9e21f874f5 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 4 May 2021 13:09:10 +0100 Subject: hw/misc/mps2-scc: Add "QEMU interface" comment The MPS2 SCC device doesn't have any documentation of its properties; add a "QEMU interface" format comment describing them. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20210504120912.23094-2-peter.maydell@linaro.org --- include/hw/misc/mps2-scc.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include/hw') diff --git a/include/hw/misc/mps2-scc.h b/include/hw/misc/mps2-scc.h index 49d0706..ea261ea 100644 --- a/include/hw/misc/mps2-scc.h +++ b/include/hw/misc/mps2-scc.h @@ -9,6 +9,18 @@ * (at your option) any later version. */ +/* + * This is a model of the Serial Communication Controller (SCC) + * block found in most MPS FPGA images. + * + * QEMU interface: + * + sysbus MMIO region 0: the register bank + * + QOM property "scc-cfg4": value of the read-only CFG4 register + * + QOM property "scc-aid": value of the read-only SCC_AID register + * + QOM property "scc-id": value of the read-only SCC_ID register + * + QOM property array "oscclk": reset values of the OSCCLK registers + * (which are accessed via the SYS_CFG channel provided by this device) + */ #ifndef MPS2_SCC_H #define MPS2_SCC_H -- cgit v1.1