From 8a2aca3d79f8719b9cf79fdcdfbb89bc6bdb522a Mon Sep 17 00:00:00 2001 From: Vijai Kumar K <vijai@behindbytes.com> Date: Thu, 1 Apr 2021 23:44:57 +0530 Subject: hw/riscv: Connect Shakti UART to Shakti platform Connect one shakti uart to the shakti_c machine. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210401181457.73039-5-vijai@behindbytes.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- include/hw/riscv/shakti_c.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/hw') diff --git a/include/hw/riscv/shakti_c.h b/include/hw/riscv/shakti_c.h index 8ffc2b0..50a2b79 100644 --- a/include/hw/riscv/shakti_c.h +++ b/include/hw/riscv/shakti_c.h @@ -21,6 +21,7 @@ #include "hw/riscv/riscv_hart.h" #include "hw/boards.h" +#include "hw/char/shakti_uart.h" #define TYPE_RISCV_SHAKTI_SOC "riscv.shakti.cclass.soc" #define RISCV_SHAKTI_SOC(obj) \ @@ -33,6 +34,7 @@ typedef struct ShaktiCSoCState { /*< public >*/ RISCVHartArrayState cpus; DeviceState *plic; + ShaktiUartState uart; MemoryRegion rom; } ShaktiCSoCState; -- cgit v1.1