From 5014c60261cf38b7c210831548c042982218a999 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Mon, 25 Nov 2019 07:58:06 +0100 Subject: ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit and use this helper to exclude CPUs which are not enabled in the XIVE controller. Signed-off-by: Cédric Le Goater Message-Id: <20191125065820.927-7-clg@kaod.org> Signed-off-by: David Gibson --- include/hw/ppc/pnv.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/hw') diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 03cb429..12b0169 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -99,6 +99,11 @@ typedef struct Pnv9Chip { PnvQuad *quads; } Pnv9Chip; +/* + * A SMT8 fused core is a pair of SMT4 cores. + */ +#define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf) + typedef struct PnvChipClass { /*< private >*/ SysBusDeviceClass parent_class; -- cgit v1.1