From 5d62725b2fefd59abf7225d620f7092fd34b8e11 Mon Sep 17 00:00:00 2001 From: Suraj Jitindar Singh Date: Thu, 28 Nov 2019 14:46:54 +0100 Subject: target/ppc: Implement the VTB for HV access MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The virtual timebase register (VTB) is a 64-bit register which increments at the same rate as the timebase register, present on POWER8 and later processors. The register is able to be read/written by the hypervisor and read by the supervisor. All other accesses are illegal. Currently the VTB is just an alias for the timebase (TB) register. Implement the VTB so that is can be read/written independent of the TB. Make use of the existing method for accessing timebase facilities where by the compensation is stored and used to compute the value on reads/is updated on writes. Signed-off-by: Suraj Jitindar Singh [ clg: rebased on current ppc tree ] Signed-off-by: Cédric Le Goater Message-Id: <20191128134700.16091-2-clg@kaod.org> Signed-off-by: David Gibson --- include/hw/ppc/ppc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/hw/ppc/ppc.h') diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h index 89e1dd0..d7a9560 100644 --- a/include/hw/ppc/ppc.h +++ b/include/hw/ppc/ppc.h @@ -24,6 +24,7 @@ struct ppc_tb_t { /* Time base management */ int64_t tb_offset; /* Compensation */ int64_t atb_offset; /* Compensation */ + int64_t vtb_offset; uint32_t tb_freq; /* TB frequency */ /* Decrementer management */ uint64_t decr_next; /* Tick for next decr interrupt */ -- cgit v1.1