From db1015e92e04835c9eb50c29625fe566d1202dbd Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Thu, 3 Sep 2020 16:43:22 -0400 Subject: Move QOM typedefs and add missing includes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé Reviewed-by: Juan Quintela Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/pci-host/designware.h | 8 +++++--- include/hw/pci-host/gpex.h | 11 +++++++---- include/hw/pci-host/i440fx.h | 6 ++++-- include/hw/pci-host/pnv_phb3.h | 11 +++++++---- include/hw/pci-host/pnv_phb4.h | 6 ++++-- include/hw/pci-host/q35.h | 11 +++++++---- include/hw/pci-host/sabre.h | 11 +++++++---- include/hw/pci-host/spapr.h | 3 ++- include/hw/pci-host/uninorth.h | 11 +++++++---- include/hw/pci-host/xilinx-pcie.h | 11 +++++++---- 10 files changed, 57 insertions(+), 32 deletions(-) (limited to 'include/hw/pci-host') diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h index 31c4123..43ee5b3 100644 --- a/include/hw/pci-host/designware.h +++ b/include/hw/pci-host/designware.h @@ -26,17 +26,19 @@ #include "hw/pci/pci_bus.h" #include "hw/pci/pcie_host.h" #include "hw/pci/pci_bridge.h" +#include "qom/object.h" #define TYPE_DESIGNWARE_PCIE_HOST "designware-pcie-host" +typedef struct DesignwarePCIEHost DesignwarePCIEHost; #define DESIGNWARE_PCIE_HOST(obj) \ OBJECT_CHECK(DesignwarePCIEHost, (obj), TYPE_DESIGNWARE_PCIE_HOST) #define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root" +typedef struct DesignwarePCIERoot DesignwarePCIERoot; #define DESIGNWARE_PCIE_ROOT(obj) \ OBJECT_CHECK(DesignwarePCIERoot, (obj), TYPE_DESIGNWARE_PCIE_ROOT) struct DesignwarePCIERoot; -typedef struct DesignwarePCIERoot DesignwarePCIERoot; typedef struct DesignwarePCIEViewport { DesignwarePCIERoot *root; @@ -80,7 +82,7 @@ struct DesignwarePCIERoot { DesignwarePCIEMSI msi; }; -typedef struct DesignwarePCIEHost { +struct DesignwarePCIEHost { PCIHostState parent_obj; DesignwarePCIERoot root; @@ -96,6 +98,6 @@ typedef struct DesignwarePCIEHost { } pci; MemoryRegion mmio; -} DesignwarePCIEHost; +}; #endif /* DESIGNWARE_H */ diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index faea040..d70e1c6 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -23,24 +23,27 @@ #include "hw/sysbus.h" #include "hw/pci/pci.h" #include "hw/pci/pcie_host.h" +#include "qom/object.h" #define TYPE_GPEX_HOST "gpex-pcihost" +typedef struct GPEXHost GPEXHost; #define GPEX_HOST(obj) \ OBJECT_CHECK(GPEXHost, (obj), TYPE_GPEX_HOST) #define TYPE_GPEX_ROOT_DEVICE "gpex-root" +typedef struct GPEXRootState GPEXRootState; #define MCH_PCI_DEVICE(obj) \ OBJECT_CHECK(GPEXRootState, (obj), TYPE_GPEX_ROOT_DEVICE) #define GPEX_NUM_IRQS 4 -typedef struct GPEXRootState { +struct GPEXRootState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ -} GPEXRootState; +}; -typedef struct GPEXHost { +struct GPEXHost { /*< private >*/ PCIExpressHost parent_obj; /*< public >*/ @@ -51,7 +54,7 @@ typedef struct GPEXHost { MemoryRegion io_mmio; qemu_irq irq[GPEX_NUM_IRQS]; int irq_num[GPEX_NUM_IRQS]; -} GPEXHost; +}; int gpex_set_irq_num(GPEXHost *s, int index, int gsi); diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index cc58d82..74fe300 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -14,14 +14,16 @@ #include "hw/hw.h" #include "hw/pci/pci_bus.h" #include "hw/pci-host/pam.h" +#include "qom/object.h" #define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost" #define TYPE_I440FX_PCI_DEVICE "i440FX" +typedef struct PCII440FXState PCII440FXState; #define I440FX_PCI_DEVICE(obj) \ OBJECT_CHECK(PCII440FXState, (obj), TYPE_I440FX_PCI_DEVICE) -typedef struct PCII440FXState { +struct PCII440FXState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -32,7 +34,7 @@ typedef struct PCII440FXState { PAMMemoryRegion pam_regions[13]; MemoryRegion smram_region; MemoryRegion smram, low_smram; -} PCII440FXState; +}; #define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX" diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 75b7878..43f9e87 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -13,6 +13,7 @@ #include "hw/pci/pcie_host.h" #include "hw/pci/pcie_port.h" #include "hw/ppc/xics.h" +#include "qom/object.h" typedef struct PnvPHB3 PnvPHB3; @@ -20,18 +21,19 @@ typedef struct PnvPHB3 PnvPHB3; * PHB3 XICS Source for MSIs */ #define TYPE_PHB3_MSI "phb3-msi" +typedef struct Phb3MsiState Phb3MsiState; #define PHB3_MSI(obj) OBJECT_CHECK(Phb3MsiState, (obj), TYPE_PHB3_MSI) #define PHB3_MAX_MSI 2048 -typedef struct Phb3MsiState { +struct Phb3MsiState { ICSState ics; qemu_irq *qirqs; PnvPHB3 *phb; uint64_t rba[PHB3_MAX_MSI / 64]; uint32_t rba_sum; -} Phb3MsiState; +}; void pnv_phb3_msi_update_config(Phb3MsiState *msis, uint32_t base, uint32_t count); @@ -69,9 +71,10 @@ typedef struct PnvPhb3DMASpace { * PHB3 Power Bus Common Queue */ #define TYPE_PNV_PBCQ "pnv-pbcq" +typedef struct PnvPBCQState PnvPBCQState; #define PNV_PBCQ(obj) OBJECT_CHECK(PnvPBCQState, (obj), TYPE_PNV_PBCQ) -typedef struct PnvPBCQState { +struct PnvPBCQState { DeviceState parent; uint32_t nest_xbase; @@ -96,7 +99,7 @@ typedef struct PnvPBCQState { MemoryRegion xscom_nest_regs; MemoryRegion xscom_pci_regs; MemoryRegion xscom_spci_regs; -} PnvPBCQState; +}; /* * PHB3 PCIe Root port diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index c882bfd..450602c 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -13,6 +13,7 @@ #include "hw/pci/pcie_host.h" #include "hw/pci/pcie_port.h" #include "hw/ppc/xive.h" +#include "qom/object.h" typedef struct PnvPhb4PecState PnvPhb4PecState; typedef struct PnvPhb4PecStack PnvPhb4PecStack; @@ -140,6 +141,7 @@ extern const MemoryRegionOps pnv_phb4_xscom_ops; * PHB4 PEC (PCI Express Controller) */ #define TYPE_PNV_PHB4_PEC "pnv-phb4-pec" +typedef struct PnvPhb4PecClass PnvPhb4PecClass; #define PNV_PHB4_PEC(obj) \ OBJECT_CHECK(PnvPhb4PecState, (obj), TYPE_PNV_PHB4_PEC) @@ -214,7 +216,7 @@ struct PnvPhb4PecState { #define PNV_PHB4_PEC_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvPhb4PecClass, (obj), TYPE_PNV_PHB4_PEC) -typedef struct PnvPhb4PecClass { +struct PnvPhb4PecClass { DeviceClass parent_class; uint32_t (*xscom_nest_base)(PnvPhb4PecState *pec); @@ -225,6 +227,6 @@ typedef struct PnvPhb4PecClass { int compat_size; const char *stk_compat; int stk_compat_size; -} PnvPhb4PecClass; +}; #endif /* PCI_HOST_PNV_PHB4_H */ diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 070305f..5db5a76 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -27,16 +27,19 @@ #include "hw/pci-host/pam.h" #include "qemu/units.h" #include "qemu/range.h" +#include "qom/object.h" #define TYPE_Q35_HOST_DEVICE "q35-pcihost" +typedef struct Q35PCIHost Q35PCIHost; #define Q35_HOST_DEVICE(obj) \ OBJECT_CHECK(Q35PCIHost, (obj), TYPE_Q35_HOST_DEVICE) #define TYPE_MCH_PCI_DEVICE "mch" +typedef struct MCHPCIState MCHPCIState; #define MCH_PCI_DEVICE(obj) \ OBJECT_CHECK(MCHPCIState, (obj), TYPE_MCH_PCI_DEVICE) -typedef struct MCHPCIState { +struct MCHPCIState { /*< private >*/ PCIDevice parent_obj; /*< public >*/ @@ -57,16 +60,16 @@ typedef struct MCHPCIState { uint64_t pci_hole64_size; uint32_t short_root_bus; uint16_t ext_tseg_mbytes; -} MCHPCIState; +}; -typedef struct Q35PCIHost { +struct Q35PCIHost { /*< private >*/ PCIExpressHost parent_obj; /*< public >*/ bool pci_hole64_fix; MCHPCIState mch; -} Q35PCIHost; +}; #define Q35_MASK(bit, ms_bit, ls_bit) \ ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1))) diff --git a/include/hw/pci-host/sabre.h b/include/hw/pci-host/sabre.h index 99b5aef..5fb508e 100644 --- a/include/hw/pci-host/sabre.h +++ b/include/hw/pci-host/sabre.h @@ -4,6 +4,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/sparc/sun4u_iommu.h" +#include "qom/object.h" #define MAX_IVEC 0x40 @@ -16,15 +17,16 @@ #define OBIO_MSE_IRQ 0x2a #define OBIO_SER_IRQ 0x2b -typedef struct SabrePCIState { +struct SabrePCIState { PCIDevice parent_obj; -} SabrePCIState; +}; +typedef struct SabrePCIState SabrePCIState; #define TYPE_SABRE_PCI_DEVICE "sabre-pci" #define SABRE_PCI_DEVICE(obj) \ OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE) -typedef struct SabreState { +struct SabreState { PCIHostState parent_obj; hwaddr special_base; @@ -45,7 +47,8 @@ typedef struct SabreState { unsigned int irq_request; uint32_t reset_control; unsigned int nr_resets; -} SabreState; +}; +typedef struct SabreState SabreState; #define TYPE_SABRE "sabre" #define SABRE_DEVICE(obj) \ diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 600eb55..783e890 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -24,15 +24,16 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/ppc/xics.h" +#include "qom/object.h" #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" +typedef struct SpaprPhbState SpaprPhbState; #define SPAPR_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(SpaprPhbState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) #define SPAPR_PCI_DMA_MAX_WINDOWS 2 -typedef struct SpaprPhbState SpaprPhbState; typedef struct SpaprPciMsi { uint32_t first_irq; diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index 72d2a97..a1f3aaa 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -27,6 +27,7 @@ #include "hw/pci/pci_host.h" #include "hw/ppc/openpic.h" +#include "qom/object.h" /* UniNorth version */ #define UNINORTH_VERSION_10A 0x7 @@ -36,6 +37,7 @@ #define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost" #define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" +typedef struct UNINHostState UNINHostState; #define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) #define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ @@ -45,7 +47,7 @@ #define U3_AGP_HOST_BRIDGE(obj) \ OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE) -typedef struct UNINHostState { +struct UNINHostState { PCIHostState parent_obj; uint32_t ofw_addr; @@ -54,13 +56,14 @@ typedef struct UNINHostState { MemoryRegion pci_mmio; MemoryRegion pci_hole; MemoryRegion pci_io; -} UNINHostState; +}; -typedef struct UNINState { +struct UNINState { SysBusDevice parent_obj; MemoryRegion mem; -} UNINState; +}; +typedef struct UNINState UNINState; #define TYPE_UNI_NORTH "uni-north" #define UNI_NORTH(obj) \ diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx-pcie.h index c0f1531..1cbd6d2 100644 --- a/include/hw/pci-host/xilinx-pcie.h +++ b/include/hw/pci-host/xilinx-pcie.h @@ -24,25 +24,28 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pcie_host.h" +#include "qom/object.h" #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" +typedef struct XilinxPCIEHost XilinxPCIEHost; #define XILINX_PCIE_HOST(obj) \ OBJECT_CHECK(XilinxPCIEHost, (obj), TYPE_XILINX_PCIE_HOST) #define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root" +typedef struct XilinxPCIERoot XilinxPCIERoot; #define XILINX_PCIE_ROOT(obj) \ OBJECT_CHECK(XilinxPCIERoot, (obj), TYPE_XILINX_PCIE_ROOT) -typedef struct XilinxPCIERoot { +struct XilinxPCIERoot { PCIBridge parent_obj; -} XilinxPCIERoot; +}; typedef struct XilinxPCIEInt { uint32_t fifo_reg1; uint32_t fifo_reg2; } XilinxPCIEInt; -typedef struct XilinxPCIEHost { +struct XilinxPCIEHost { PCIExpressHost parent_obj; char name[16]; @@ -62,6 +65,6 @@ typedef struct XilinxPCIEHost { XilinxPCIEInt intr_fifo[16]; unsigned int intr_fifo_r, intr_fifo_w; uint32_t rpscr; -} XilinxPCIEHost; +}; #endif /* HW_XILINX_PCIE_H */ -- cgit v1.1 From 8110fa1d94f2997badc2af39231a1d279c5bb1ee Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Mon, 31 Aug 2020 17:07:33 -0400 Subject: Use DECLARE_*CHECKER* macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé Reviewed-by: Juan Quintela Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/pci-host/designware.h | 8 ++++---- include/hw/pci-host/gpex.h | 8 ++++---- include/hw/pci-host/i440fx.h | 4 ++-- include/hw/pci-host/pnv_phb3.h | 9 ++++++--- include/hw/pci-host/pnv_phb4.h | 15 ++++++--------- include/hw/pci-host/q35.h | 8 ++++---- include/hw/pci-host/sabre.h | 8 ++++---- include/hw/pci-host/spapr.h | 4 ++-- include/hw/pci-host/uninorth.h | 20 ++++++++++---------- include/hw/pci-host/xilinx-pcie.h | 8 ++++---- 10 files changed, 46 insertions(+), 46 deletions(-) (limited to 'include/hw/pci-host') diff --git a/include/hw/pci-host/designware.h b/include/hw/pci-host/designware.h index 43ee5b3..551eec3 100644 --- a/include/hw/pci-host/designware.h +++ b/include/hw/pci-host/designware.h @@ -30,13 +30,13 @@ #define TYPE_DESIGNWARE_PCIE_HOST "designware-pcie-host" typedef struct DesignwarePCIEHost DesignwarePCIEHost; -#define DESIGNWARE_PCIE_HOST(obj) \ - OBJECT_CHECK(DesignwarePCIEHost, (obj), TYPE_DESIGNWARE_PCIE_HOST) +DECLARE_INSTANCE_CHECKER(DesignwarePCIEHost, DESIGNWARE_PCIE_HOST, + TYPE_DESIGNWARE_PCIE_HOST) #define TYPE_DESIGNWARE_PCIE_ROOT "designware-pcie-root" typedef struct DesignwarePCIERoot DesignwarePCIERoot; -#define DESIGNWARE_PCIE_ROOT(obj) \ - OBJECT_CHECK(DesignwarePCIERoot, (obj), TYPE_DESIGNWARE_PCIE_ROOT) +DECLARE_INSTANCE_CHECKER(DesignwarePCIERoot, DESIGNWARE_PCIE_ROOT, + TYPE_DESIGNWARE_PCIE_ROOT) struct DesignwarePCIERoot; diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index d70e1c6..e8432ec 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -27,13 +27,13 @@ #define TYPE_GPEX_HOST "gpex-pcihost" typedef struct GPEXHost GPEXHost; -#define GPEX_HOST(obj) \ - OBJECT_CHECK(GPEXHost, (obj), TYPE_GPEX_HOST) +DECLARE_INSTANCE_CHECKER(GPEXHost, GPEX_HOST, + TYPE_GPEX_HOST) #define TYPE_GPEX_ROOT_DEVICE "gpex-root" typedef struct GPEXRootState GPEXRootState; -#define MCH_PCI_DEVICE(obj) \ - OBJECT_CHECK(GPEXRootState, (obj), TYPE_GPEX_ROOT_DEVICE) +DECLARE_INSTANCE_CHECKER(GPEXRootState, MCH_PCI_DEVICE, + TYPE_GPEX_ROOT_DEVICE) #define GPEX_NUM_IRQS 4 diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h index 74fe300..046c645 100644 --- a/include/hw/pci-host/i440fx.h +++ b/include/hw/pci-host/i440fx.h @@ -20,8 +20,8 @@ #define TYPE_I440FX_PCI_DEVICE "i440FX" typedef struct PCII440FXState PCII440FXState; -#define I440FX_PCI_DEVICE(obj) \ - OBJECT_CHECK(PCII440FXState, (obj), TYPE_I440FX_PCI_DEVICE) +DECLARE_INSTANCE_CHECKER(PCII440FXState, I440FX_PCI_DEVICE, + TYPE_I440FX_PCI_DEVICE) struct PCII440FXState { /*< private >*/ diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index 43f9e87..182f29d 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -22,7 +22,8 @@ typedef struct PnvPHB3 PnvPHB3; */ #define TYPE_PHB3_MSI "phb3-msi" typedef struct Phb3MsiState Phb3MsiState; -#define PHB3_MSI(obj) OBJECT_CHECK(Phb3MsiState, (obj), TYPE_PHB3_MSI) +DECLARE_INSTANCE_CHECKER(Phb3MsiState, PHB3_MSI, + TYPE_PHB3_MSI) #define PHB3_MAX_MSI 2048 @@ -72,7 +73,8 @@ typedef struct PnvPhb3DMASpace { */ #define TYPE_PNV_PBCQ "pnv-pbcq" typedef struct PnvPBCQState PnvPBCQState; -#define PNV_PBCQ(obj) OBJECT_CHECK(PnvPBCQState, (obj), TYPE_PNV_PBCQ) +DECLARE_INSTANCE_CHECKER(PnvPBCQState, PNV_PBCQ, + TYPE_PNV_PBCQ) struct PnvPBCQState { DeviceState parent; @@ -116,7 +118,8 @@ typedef struct PnvPHB3RootPort { * PHB3 PCIe Host Bridge for PowerNV machines (POWER8) */ #define TYPE_PNV_PHB3 "pnv-phb3" -#define PNV_PHB3(obj) OBJECT_CHECK(PnvPHB3, (obj), TYPE_PNV_PHB3) +DECLARE_INSTANCE_CHECKER(PnvPHB3, PNV_PHB3, + TYPE_PNV_PHB3) #define PNV_PHB3_NUM_M64 16 #define PNV_PHB3_NUM_REGS (0x1000 >> 3) diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 450602c..15a4633 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -58,7 +58,8 @@ typedef struct PnvPHB4RootPort { * PHB4 PCIe Host Bridge for PowerNV machines (POWER9) */ #define TYPE_PNV_PHB4 "pnv-phb4" -#define PNV_PHB4(obj) OBJECT_CHECK(PnvPHB4, (obj), TYPE_PNV_PHB4) +DECLARE_INSTANCE_CHECKER(PnvPHB4, PNV_PHB4, + TYPE_PNV_PHB4) #define PNV_PHB4_MAX_LSIs 8 #define PNV_PHB4_MAX_INTs 4096 @@ -142,12 +143,12 @@ extern const MemoryRegionOps pnv_phb4_xscom_ops; */ #define TYPE_PNV_PHB4_PEC "pnv-phb4-pec" typedef struct PnvPhb4PecClass PnvPhb4PecClass; -#define PNV_PHB4_PEC(obj) \ - OBJECT_CHECK(PnvPhb4PecState, (obj), TYPE_PNV_PHB4_PEC) +DECLARE_OBJ_CHECKERS(PnvPhb4PecState, PnvPhb4PecClass, + PNV_PHB4_PEC, TYPE_PNV_PHB4_PEC) #define TYPE_PNV_PHB4_PEC_STACK "pnv-phb4-pec-stack" -#define PNV_PHB4_PEC_STACK(obj) \ - OBJECT_CHECK(PnvPhb4PecStack, (obj), TYPE_PNV_PHB4_PEC_STACK) +DECLARE_INSTANCE_CHECKER(PnvPhb4PecStack, PNV_PHB4_PEC_STACK, + TYPE_PNV_PHB4_PEC_STACK) /* Per-stack data */ struct PnvPhb4PecStack { @@ -211,10 +212,6 @@ struct PnvPhb4PecState { PnvPhb4PecStack stacks[PHB4_PEC_MAX_STACKS]; }; -#define PNV_PHB4_PEC_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvPhb4PecClass, (klass), TYPE_PNV_PHB4_PEC) -#define PNV_PHB4_PEC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvPhb4PecClass, (obj), TYPE_PNV_PHB4_PEC) struct PnvPhb4PecClass { DeviceClass parent_class; diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 5db5a76..0f5a534 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -31,13 +31,13 @@ #define TYPE_Q35_HOST_DEVICE "q35-pcihost" typedef struct Q35PCIHost Q35PCIHost; -#define Q35_HOST_DEVICE(obj) \ - OBJECT_CHECK(Q35PCIHost, (obj), TYPE_Q35_HOST_DEVICE) +DECLARE_INSTANCE_CHECKER(Q35PCIHost, Q35_HOST_DEVICE, + TYPE_Q35_HOST_DEVICE) #define TYPE_MCH_PCI_DEVICE "mch" typedef struct MCHPCIState MCHPCIState; -#define MCH_PCI_DEVICE(obj) \ - OBJECT_CHECK(MCHPCIState, (obj), TYPE_MCH_PCI_DEVICE) +DECLARE_INSTANCE_CHECKER(MCHPCIState, MCH_PCI_DEVICE, + TYPE_MCH_PCI_DEVICE) struct MCHPCIState { /*< private >*/ diff --git a/include/hw/pci-host/sabre.h b/include/hw/pci-host/sabre.h index 5fb508e..597bf70 100644 --- a/include/hw/pci-host/sabre.h +++ b/include/hw/pci-host/sabre.h @@ -23,8 +23,8 @@ struct SabrePCIState { typedef struct SabrePCIState SabrePCIState; #define TYPE_SABRE_PCI_DEVICE "sabre-pci" -#define SABRE_PCI_DEVICE(obj) \ - OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE) +DECLARE_INSTANCE_CHECKER(SabrePCIState, SABRE_PCI_DEVICE, + TYPE_SABRE_PCI_DEVICE) struct SabreState { PCIHostState parent_obj; @@ -51,7 +51,7 @@ struct SabreState { typedef struct SabreState SabreState; #define TYPE_SABRE "sabre" -#define SABRE_DEVICE(obj) \ - OBJECT_CHECK(SabreState, (obj), TYPE_SABRE) +DECLARE_INSTANCE_CHECKER(SabreState, SABRE_DEVICE, + TYPE_SABRE) #endif diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 783e890..0431ce1 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -29,8 +29,8 @@ #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" typedef struct SpaprPhbState SpaprPhbState; -#define SPAPR_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(SpaprPhbState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) +DECLARE_INSTANCE_CHECKER(SpaprPhbState, SPAPR_PCI_HOST_BRIDGE, + TYPE_SPAPR_PCI_HOST_BRIDGE) #define SPAPR_PCI_DMA_MAX_WINDOWS 2 diff --git a/include/hw/pci-host/uninorth.h b/include/hw/pci-host/uninorth.h index a1f3aaa..d10c598 100644 --- a/include/hw/pci-host/uninorth.h +++ b/include/hw/pci-host/uninorth.h @@ -38,14 +38,14 @@ #define TYPE_U3_AGP_HOST_BRIDGE "u3-agp-pcihost" typedef struct UNINHostState UNINHostState; -#define UNI_NORTH_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_PCI_HOST_BRIDGE) -#define UNI_NORTH_AGP_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_AGP_HOST_BRIDGE) -#define UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINHostState, (obj), TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE) -#define U3_AGP_HOST_BRIDGE(obj) \ - OBJECT_CHECK(UNINHostState, (obj), TYPE_U3_AGP_HOST_BRIDGE) +DECLARE_INSTANCE_CHECKER(UNINHostState, UNI_NORTH_PCI_HOST_BRIDGE, + TYPE_UNI_NORTH_PCI_HOST_BRIDGE) +DECLARE_INSTANCE_CHECKER(UNINHostState, UNI_NORTH_AGP_HOST_BRIDGE, + TYPE_UNI_NORTH_AGP_HOST_BRIDGE) +DECLARE_INSTANCE_CHECKER(UNINHostState, UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE, + TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE) +DECLARE_INSTANCE_CHECKER(UNINHostState, U3_AGP_HOST_BRIDGE, + TYPE_U3_AGP_HOST_BRIDGE) struct UNINHostState { PCIHostState parent_obj; @@ -66,7 +66,7 @@ struct UNINState { typedef struct UNINState UNINState; #define TYPE_UNI_NORTH "uni-north" -#define UNI_NORTH(obj) \ - OBJECT_CHECK(UNINState, (obj), TYPE_UNI_NORTH) +DECLARE_INSTANCE_CHECKER(UNINState, UNI_NORTH, + TYPE_UNI_NORTH) #endif /* UNINORTH_H */ diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx-pcie.h index 1cbd6d2..6058c8c 100644 --- a/include/hw/pci-host/xilinx-pcie.h +++ b/include/hw/pci-host/xilinx-pcie.h @@ -28,13 +28,13 @@ #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" typedef struct XilinxPCIEHost XilinxPCIEHost; -#define XILINX_PCIE_HOST(obj) \ - OBJECT_CHECK(XilinxPCIEHost, (obj), TYPE_XILINX_PCIE_HOST) +DECLARE_INSTANCE_CHECKER(XilinxPCIEHost, XILINX_PCIE_HOST, + TYPE_XILINX_PCIE_HOST) #define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root" typedef struct XilinxPCIERoot XilinxPCIERoot; -#define XILINX_PCIE_ROOT(obj) \ - OBJECT_CHECK(XilinxPCIERoot, (obj), TYPE_XILINX_PCIE_ROOT) +DECLARE_INSTANCE_CHECKER(XilinxPCIERoot, XILINX_PCIE_ROOT, + TYPE_XILINX_PCIE_ROOT) struct XilinxPCIERoot { PCIBridge parent_obj; -- cgit v1.1 From 755cfed0071496687493ac09b4746be0d17327ba Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 2 Sep 2020 18:42:09 -0400 Subject: gpex: Fix type checking function name MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This looks like a copy/paste mistake: the instance type checking macro for TYPE_GPEX_ROOT_DEVICE was named MCH_PCI_DEVICE. Signed-off-by: Eduardo Habkost Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200902224311.1321159-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/pci-host/gpex.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw/pci-host') diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index e8432ec..2f4e852 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -32,7 +32,7 @@ DECLARE_INSTANCE_CHECKER(GPEXHost, GPEX_HOST, #define TYPE_GPEX_ROOT_DEVICE "gpex-root" typedef struct GPEXRootState GPEXRootState; -DECLARE_INSTANCE_CHECKER(GPEXRootState, MCH_PCI_DEVICE, +DECLARE_INSTANCE_CHECKER(GPEXRootState, GPEX_ROOT_DEVICE, TYPE_GPEX_ROOT_DEVICE) #define GPEX_NUM_IRQS 4 -- cgit v1.1 From 5b07883c2b90f23d32603e1d01665711401b760d Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Wed, 2 Sep 2020 18:42:56 -0400 Subject: sabre: Rename SABRE_DEVICE to SABRE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make the type checking macro name consistent with the TYPE_* constant. Signed-off-by: Eduardo Habkost Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200902224311.1321159-49-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost --- include/hw/pci-host/sabre.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/hw/pci-host') diff --git a/include/hw/pci-host/sabre.h b/include/hw/pci-host/sabre.h index 597bf70..7a76de4 100644 --- a/include/hw/pci-host/sabre.h +++ b/include/hw/pci-host/sabre.h @@ -51,7 +51,7 @@ struct SabreState { typedef struct SabreState SabreState; #define TYPE_SABRE "sabre" -DECLARE_INSTANCE_CHECKER(SabreState, SABRE_DEVICE, +DECLARE_INSTANCE_CHECKER(SabreState, SABRE, TYPE_SABRE) #endif -- cgit v1.1