From 9b30179460e5f6f8fc732a6c0e91f9d954310fe4 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Sun, 21 Jan 2018 08:59:45 +0000 Subject: apb: rename apb.c to sabre.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is the final stage in correcting the naming convention with respect to sabre, APB and PBM. It is effectively a file rename from apb.c to sabre.c along with touching up a few constants to remove the remaining references to APB. Note that as part of the rename process the configuration variable CONFIG_PCI_APB is changed to CONFIG_PCI_SABRE. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Acked-by: Artyom Tarasenko --- include/hw/pci-host/apb.h | 52 --------------------------------------------- include/hw/pci-host/sabre.h | 52 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 52 deletions(-) delete mode 100644 include/hw/pci-host/apb.h create mode 100644 include/hw/pci-host/sabre.h (limited to 'include/hw/pci-host') diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h deleted file mode 100644 index 2552f3c..0000000 --- a/include/hw/pci-host/apb.h +++ /dev/null @@ -1,52 +0,0 @@ -#ifndef PCI_HOST_APB_H -#define PCI_HOST_APB_H - -#include "hw/sparc/sun4u_iommu.h" - -#define MAX_IVEC 0x40 - -/* OBIO IVEC IRQs */ -#define OBIO_HDD_IRQ 0x20 -#define OBIO_NIC_IRQ 0x21 -#define OBIO_LPT_IRQ 0x22 -#define OBIO_FDD_IRQ 0x27 -#define OBIO_KBD_IRQ 0x29 -#define OBIO_MSE_IRQ 0x2a -#define OBIO_SER_IRQ 0x2b - -typedef struct SabrePCIState { - PCIDevice parent_obj; -} SabrePCIState; - -#define TYPE_SABRE_PCI_DEVICE "sabre-pci" -#define SABRE_PCI_DEVICE(obj) \ - OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE) - -typedef struct SabreState { - PCIHostState parent_obj; - - hwaddr special_base; - hwaddr mem_base; - MemoryRegion apb_config; - MemoryRegion pci_config; - MemoryRegion pci_mmio; - MemoryRegion pci_ioport; - uint64_t pci_irq_in; - IOMMUState *iommu; - PCIBridge *bridgeA; - PCIBridge *bridgeB; - uint32_t pci_control[16]; - uint32_t pci_irq_map[8]; - uint32_t pci_err_irq_map[4]; - uint32_t obio_irq_map[32]; - qemu_irq ivec_irqs[MAX_IVEC]; - unsigned int irq_request; - uint32_t reset_control; - unsigned int nr_resets; -} SabreState; - -#define TYPE_SABRE "sabre" -#define SABRE_DEVICE(obj) \ - OBJECT_CHECK(SabreState, (obj), TYPE_SABRE) - -#endif diff --git a/include/hw/pci-host/sabre.h b/include/hw/pci-host/sabre.h new file mode 100644 index 0000000..0f2ccc0 --- /dev/null +++ b/include/hw/pci-host/sabre.h @@ -0,0 +1,52 @@ +#ifndef PCI_HOST_APB_H +#define PCI_HOST_APB_H + +#include "hw/sparc/sun4u_iommu.h" + +#define MAX_IVEC 0x40 + +/* OBIO IVEC IRQs */ +#define OBIO_HDD_IRQ 0x20 +#define OBIO_NIC_IRQ 0x21 +#define OBIO_LPT_IRQ 0x22 +#define OBIO_FDD_IRQ 0x27 +#define OBIO_KBD_IRQ 0x29 +#define OBIO_MSE_IRQ 0x2a +#define OBIO_SER_IRQ 0x2b + +typedef struct SabrePCIState { + PCIDevice parent_obj; +} SabrePCIState; + +#define TYPE_SABRE_PCI_DEVICE "sabre-pci" +#define SABRE_PCI_DEVICE(obj) \ + OBJECT_CHECK(SabrePCIState, (obj), TYPE_SABRE_PCI_DEVICE) + +typedef struct SabreState { + PCIHostState parent_obj; + + hwaddr special_base; + hwaddr mem_base; + MemoryRegion sabre_config; + MemoryRegion pci_config; + MemoryRegion pci_mmio; + MemoryRegion pci_ioport; + uint64_t pci_irq_in; + IOMMUState *iommu; + PCIBridge *bridgeA; + PCIBridge *bridgeB; + uint32_t pci_control[16]; + uint32_t pci_irq_map[8]; + uint32_t pci_err_irq_map[4]; + uint32_t obio_irq_map[32]; + qemu_irq ivec_irqs[MAX_IVEC]; + unsigned int irq_request; + uint32_t reset_control; + unsigned int nr_resets; +} SabreState; + +#define TYPE_SABRE "sabre" +#define SABRE_DEVICE(obj) \ + OBJECT_CHECK(SabreState, (obj), TYPE_SABRE) + +#endif -- cgit v1.1