From 289251b033979234ed735a7b996a187880ed090e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Wed, 25 Sep 2019 16:32:47 +0200 Subject: aspeed: add support for the Aspeed MII controller of the AST2600 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The AST2600 SoC has an extra controller to set the PHY registers. Signed-off-by: Cédric Le Goater Reviewed-by: Joel Stanley Message-id: 20190925143248.10000-23-clg@kaod.org Signed-off-by: Peter Maydell --- include/hw/net/ftgmac100.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include/hw/net') diff --git a/include/hw/net/ftgmac100.h b/include/hw/net/ftgmac100.h index 94cfe05..ab37e7b 100644 --- a/include/hw/net/ftgmac100.h +++ b/include/hw/net/ftgmac100.h @@ -66,4 +66,21 @@ typedef struct FTGMAC100State { uint32_t rxdes0_edorr; } FTGMAC100State; +#define TYPE_ASPEED_MII "aspeed-mmi" +#define ASPEED_MII(obj) OBJECT_CHECK(AspeedMiiState, (obj), TYPE_ASPEED_MII) + +/* + * AST2600 MII controller + */ +typedef struct AspeedMiiState { + /*< private >*/ + SysBusDevice parent_obj; + + FTGMAC100State *nic; + + MemoryRegion iomem; + uint32_t phycr; + uint32_t phydata; +} AspeedMiiState; + #endif -- cgit v1.1