From c4379b4874f4c522f6818f1720f295205d7cf34d Mon Sep 17 00:00:00 2001 From: Julia Suvorova Date: Tue, 14 Aug 2018 17:17:19 +0100 Subject: nvic: Change NVIC to support ARMv6-M The differences from ARMv7-M NVIC are: * ARMv6-M only supports up to 32 external interrupts (configurable feature already). The ICTR is reserved. * Active Bit Register is reserved. * ARMv6-M supports 4 priority levels against 256 in ARMv7-M. Signed-off-by: Julia Suvorova Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/intc/armv7m_nvic.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/hw/intc') diff --git a/include/hw/intc/armv7m_nvic.h b/include/hw/intc/armv7m_nvic.h index 8bc2911..a472c9b 100644 --- a/include/hw/intc/armv7m_nvic.h +++ b/include/hw/intc/armv7m_nvic.h @@ -57,6 +57,7 @@ typedef struct NVICState { VecInfo sec_vectors[NVIC_INTERNAL_VECTORS]; /* The PRIGROUP field in AIRCR is banked */ uint32_t prigroup[M_REG_NUM_BANKS]; + uint8_t num_prio_bits; /* v8M NVIC_ITNS state (stored as a bool per bit) */ bool itns[NVIC_MAX_VECTORS]; -- cgit v1.1