From 932a8d1f11ccfbf196ee6fb4a5ccdf274b14a78c Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Fri, 5 Feb 2021 17:14:56 +0000 Subject: arm: Update infocenter.arm.com URLs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update infocenter.arm.com URLs for various pieces of Arm documentation to the new developer.arm.com equivalents. (There is a redirection in place from the old URLs, but we might as well update our comments in case the redirect ever disappears in future.) This patch covers all the URLs which are not MPS2/SSE-200/IoTKit related (those are dealt with in a different patch). Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Message-id: 20210205171456.19939-1-peter.maydell@linaro.org --- include/hw/dma/pl080.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include/hw/dma') diff --git a/include/hw/dma/pl080.h b/include/hw/dma/pl080.h index 1883f04..3c9659e 100644 --- a/include/hw/dma/pl080.h +++ b/include/hw/dma/pl080.h @@ -10,11 +10,12 @@ * (at your option) any later version. */ -/* This is a model of the Arm PrimeCell PL080/PL081 DMA controller: +/* + * This is a model of the Arm PrimeCell PL080/PL081 DMA controller: * The PL080 TRM is: - * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0196g/DDI0196.pdf + * https://developer.arm.com/documentation/ddi0196/latest * and the PL081 TRM is: - * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0218e/DDI0218.pdf + * https://developer.arm.com/documentation/ddi0218/latest * * QEMU interface: * + sysbus IRQ 0: DMACINTR combined interrupt line -- cgit v1.1