From f0095c8ad93de7652aba36c4c713d9035417bea8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Tue, 1 Apr 2025 01:04:43 +0200 Subject: hw/misc/aspeed_scu: Set MemoryRegionOps::impl::access_size to 32-bit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All MemoryRegionOps::read/write() handlers switch over a 32-bit aligned value, because converted using TO_REG(), which is defined as: #define TO_REG(offset) ((offset) >> 2) So all implementations are 32-bit. Set min/max access_size accordingly. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-2-philmd@linaro.org Signed-off-by: Cédric Le Goater --- hw/misc/aspeed_scu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'hw') diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 76cfd91..6703f3f 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -427,6 +427,10 @@ static const MemoryRegionOps aspeed_ast2400_scu_ops = { .read = aspeed_scu_read, .write = aspeed_ast2400_scu_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, .valid = { .min_access_size = 1, .max_access_size = 4, @@ -437,6 +441,8 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = { .read = aspeed_scu_read, .write = aspeed_ast2500_scu_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl.min_access_size = 4, + .impl.max_access_size = 4, .valid.min_access_size = 4, .valid.max_access_size = 4, .valid.unaligned = false, @@ -779,6 +785,8 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = { .read = aspeed_ast2600_scu_read, .write = aspeed_ast2600_scu_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl.min_access_size = 4, + .impl.max_access_size = 4, .valid.min_access_size = 4, .valid.max_access_size = 4, .valid.unaligned = false, @@ -906,6 +914,8 @@ static const MemoryRegionOps aspeed_ast2700_scu_ops = { .read = aspeed_ast2700_scu_read, .write = aspeed_ast2700_scu_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl.min_access_size = 4, + .impl.max_access_size = 4, .valid.min_access_size = 1, .valid.max_access_size = 8, .valid.unaligned = false, @@ -1028,6 +1038,8 @@ static const MemoryRegionOps aspeed_ast2700_scuio_ops = { .read = aspeed_ast2700_scuio_read, .write = aspeed_ast2700_scuio_write, .endianness = DEVICE_LITTLE_ENDIAN, + .impl.min_access_size = 4, + .impl.max_access_size = 4, .valid.min_access_size = 1, .valid.max_access_size = 8, .valid.unaligned = false, -- cgit v1.1 From 20ab88a9066bcacc28acbd7cbe2c617d90bfb27e Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Tue, 1 Apr 2025 01:04:44 +0200 Subject: hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Guest code was performing a byte load to the SCU MMIO region, leading to the guest code crashing (it should be using proper accessors, but that is not Qemu's bug). Hardware and the documentation[1] both agree that byte loads are okay, so change all of the aspeed SCU devices to accept a minimum access size of 1. [1] See the 'ARM Address Space Mapping' table in the ASPEED docs. This is section 6.1 in the ast2400 and ast2700, and 7.1 in the ast2500 and ast2600 datasheets. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2636 Signed-off-by: Joel Stanley Reviewed-by: Troy Lee Message-ID: <20241118021820.4928-1-joel@jms.id.au> [PMD: Rebased, only including SCU changes] Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Andrew Jeffery Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-3-philmd@linaro.org Signed-off-by: Cédric Le Goater --- hw/misc/aspeed_scu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hw') diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 6703f3f..1af1a35 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -443,7 +443,7 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .impl.min_access_size = 4, .impl.max_access_size = 4, - .valid.min_access_size = 4, + .valid.min_access_size = 1, .valid.max_access_size = 4, .valid.unaligned = false, }; @@ -787,7 +787,7 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .impl.min_access_size = 4, .impl.max_access_size = 4, - .valid.min_access_size = 4, + .valid.min_access_size = 1, .valid.max_access_size = 4, .valid.unaligned = false, }; -- cgit v1.1