From 66e2f304a3af6304a3ba449b708e29fc4d2f6dc2 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: cg3: remove TARGET_PAGE_SIZE rounding on dirty page detection This was an artifact from very early versions of the code from before the memory API and is no longer needed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/cg3.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'hw') diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 1174220..7d43694 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -26,7 +26,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu-common.h" -#include "cpu.h" #include "qemu/error-report.h" #include "ui/console.h" #include "hw/sysbus.h" @@ -114,7 +113,7 @@ static void cg3_update_display(void *opaque) for (y = 0; y < height; y++) { int update = s->full_update; - page = (y * width) & TARGET_PAGE_MASK; + page = y * width; update |= memory_region_get_dirty(&s->vram_mem, page, page + width, DIRTY_MEMORY_VGA); if (update) { @@ -148,8 +147,7 @@ static void cg3_update_display(void *opaque) } if (page_max >= page_min) { memory_region_reset_dirty(&s->vram_mem, - page_min, page_max - page_min + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); + page_min, page_max - page_min, DIRTY_MEMORY_VGA); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { -- cgit v1.1 From be4221d993cc15d3a14ca01181818ba5c41d5ab5 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: cg3: fix up size parameter for memory_region_get_dirty() The code was incorrectly calculating the end address rather than the size of the required region. Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/cg3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 7d43694..b42f60e 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -114,7 +114,7 @@ static void cg3_update_display(void *opaque) int update = s->full_update; page = y * width; - update |= memory_region_get_dirty(&s->vram_mem, page, page + width, + update |= memory_region_get_dirty(&s->vram_mem, page, width, DIRTY_MEMORY_VGA); if (update) { if (y_start < 0) { -- cgit v1.1 From 8c95e1f20c18007f30bdba6a60e99aea37cc473b Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: cg3: switch to load_image_mr() and remove prom-addr hack MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previous to the existence of load_image_mr(), the only way to load in the FCode ROM image was to pass in its physical address via qdev properties and use load_image_targphys(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daudé --- hw/display/cg3.c | 4 +--- hw/sparc/sun4m.c | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) (limited to 'hw') diff --git a/hw/display/cg3.c b/hw/display/cg3.c index b42f60e..03d9197 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -303,8 +303,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) vmstate_register_ram_global(&s->rom); fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE); if (fcode_filename) { - ret = load_image_targphys(fcode_filename, s->prom_addr, - FCODE_MAX_ROM_SIZE); + ret = load_image_mr(fcode_filename, &s->rom); g_free(fcode_filename); if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) { error_report("cg3: could not load prom '%s'", CG3_ROM_FILE); @@ -369,7 +368,6 @@ static Property cg3_properties[] = { DEFINE_PROP_UINT16("width", CG3State, width, -1), DEFINE_PROP_UINT16("height", CG3State, height, -1), DEFINE_PROP_UINT16("depth", CG3State, depth, -1), - DEFINE_PROP_UINT64("prom-addr", CG3State, prom_addr, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 873cd7d..7a0922b 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -544,7 +544,6 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width, qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_prop_set_uint64(dev, "prom-addr", addr); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); -- cgit v1.1 From 9800b3c20e79b4203f08ca13c7c3cb602cda1618 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: tcx: alter tcx_set_dirty() to accept address and length parameters Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 8e26aae..d24466f 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -93,9 +93,9 @@ typedef struct TCXState { uint16_t cursy; } TCXState; -static void tcx_set_dirty(TCXState *s) +static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) { - memory_region_set_dirty(&s->vram_mem, 0, MAXX * MAXY); + memory_region_set_dirty(&s->vram_mem, addr, len); } static inline int tcx24_check_dirty(TCXState *s, ram_addr_t page, @@ -156,7 +156,7 @@ static void update_palette_entries(TCXState *s, int start, int end) break; } } - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); } static void tcx_draw_line32(TCXState *s1, uint8_t *d, @@ -526,7 +526,7 @@ static void tcx_invalidate_display(void *opaque) { TCXState *s = opaque; - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); qemu_console_resize(s->con, s->width, s->height); } @@ -534,7 +534,7 @@ static void tcx24_invalidate_display(void *opaque) { TCXState *s = opaque; - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); qemu_console_resize(s->con, s->width, s->height); } @@ -543,7 +543,7 @@ static int vmstate_tcx_post_load(void *opaque, int version_id) TCXState *s = opaque; update_palette_entries(s, 0, 256); - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); return 0; } -- cgit v1.1 From 4b865c28099ddd365062f46dd1ad83c03b2468eb Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: tcx: ensure tcx_set_dirty() also invalidates the 24-bit plane and cplane Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index d24466f..6817bd2 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -96,6 +96,13 @@ typedef struct TCXState { static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) { memory_region_set_dirty(&s->vram_mem, addr, len); + + if (s->depth == 24) { + memory_region_set_dirty(&s->vram_mem, s->vram24_offset + addr * 4, + len * 4); + memory_region_set_dirty(&s->vram_mem, s->cplane_offset + addr * 4, + len * 4); + } } static inline int tcx24_check_dirty(TCXState *s, ram_addr_t page, -- cgit v1.1 From 427ee02bc9a3b8b5d5cb1066f6100a89eba6b201 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: tcx: alter tcx24_check_dirty() to accept address and length parameters This can now be used by both the 8-bit and 24-bit display code, so rename to tcx_check_dirty(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 6817bd2..171236a 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -105,17 +105,21 @@ static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) } } -static inline int tcx24_check_dirty(TCXState *s, ram_addr_t page, - ram_addr_t page24, ram_addr_t cpage) +static int tcx_check_dirty(TCXState *s, ram_addr_t addr, int len) { int ret; - ret = memory_region_get_dirty(&s->vram_mem, page, TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); - ret |= memory_region_get_dirty(&s->vram_mem, page24, TARGET_PAGE_SIZE * 4, - DIRTY_MEMORY_VGA); - ret |= memory_region_get_dirty(&s->vram_mem, cpage, TARGET_PAGE_SIZE * 4, - DIRTY_MEMORY_VGA); + ret = memory_region_get_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA); + + if (s->depth == 24) { + ret |= memory_region_get_dirty(&s->vram_mem, + s->vram24_offset + addr * 4, len * 4, + DIRTY_MEMORY_VGA); + ret |= memory_region_get_dirty(&s->vram_mem, + s->cplane_offset + addr * 4, len * 4, + DIRTY_MEMORY_VGA); + } + return ret; } @@ -366,8 +370,7 @@ static void tcx_update_display(void *opaque) memory_region_sync_dirty_bitmap(&ts->vram_mem); for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE) { - if (memory_region_get_dirty(&ts->vram_mem, page, TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA)) { + if (tcx_check_dirty(ts, page, TARGET_PAGE_SIZE)) { if (y_start < 0) y_start = y; if (page < page_min) @@ -461,7 +464,7 @@ static void tcx24_update_display(void *opaque) memory_region_sync_dirty_bitmap(&ts->vram_mem); for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE, page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) { - if (tcx24_check_dirty(ts, page, page24, cpage)) { + if (tcx_check_dirty(ts, page, TARGET_PAGE_SIZE)) { if (y_start < 0) y_start = y; if (page < page_min) -- cgit v1.1 From 36180430acfe4b3be80893b0d0a47588a48017f1 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:46 +0100 Subject: tcx: alter tcx24_reset_dirty() to accept address and length parameters This can now be used by both the 8-bit and 24-bit display code, so rename to tcx_check_dirty(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 31 +++++++++++-------------------- 1 file changed, 11 insertions(+), 20 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 171236a..e9056e0 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -123,22 +123,16 @@ static int tcx_check_dirty(TCXState *s, ram_addr_t addr, int len) return ret; } -static inline void tcx24_reset_dirty(TCXState *ts, ram_addr_t page_min, - ram_addr_t page_max, ram_addr_t page24, - ram_addr_t cpage) +static void tcx_reset_dirty(TCXState *s, ram_addr_t addr, int len) { - memory_region_reset_dirty(&ts->vram_mem, - page_min, - (page_max - page_min) + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); - memory_region_reset_dirty(&ts->vram_mem, - page24 + page_min * 4, - (page_max - page_min) * 4 + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); - memory_region_reset_dirty(&ts->vram_mem, - cpage + page_min * 4, - (page_max - page_min) * 4 + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); + memory_region_reset_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA); + + if (s->depth == 24) { + memory_region_reset_dirty(&s->vram_mem, s->vram24_offset + addr * 4, + len * 4, DIRTY_MEMORY_VGA); + memory_region_reset_dirty(&s->vram_mem, s->cplane_offset + addr * 4, + len * 4, DIRTY_MEMORY_VGA); + } } static void update_palette_entries(TCXState *s, int start, int end) @@ -428,10 +422,7 @@ static void tcx_update_display(void *opaque) } /* reset modified pages */ if (page_max >= page_min) { - memory_region_reset_dirty(&ts->vram_mem, - page_min, - (page_max - page_min) + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); + tcx_reset_dirty(ts, page_min, page_max - page_min); } } @@ -528,7 +519,7 @@ static void tcx24_update_display(void *opaque) } /* reset modified pages */ if (page_max >= page_min) { - tcx24_reset_dirty(ts, page_min, page_max, page24, cpage); + tcx_reset_dirty(ts, page_min, page_max - page_min); } } -- cgit v1.1 From 66dcabea477bed6dcaddce499f024b9bb921a598 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:47 +0100 Subject: tcx: remove page24 and cpage from tcx24_update_display() Since all of the tcx_*_dirty() functions now calculate the 24-bit and cplane offsets themselves from the base address, these variables are no longer needed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index e9056e0..4f4f03f 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -430,7 +430,7 @@ static void tcx24_update_display(void *opaque) { TCXState *ts = opaque; DisplaySurface *surface = qemu_console_surface(ts->con); - ram_addr_t page, page_min, page_max, cpage, page24; + ram_addr_t page, page_min, page_max; int y, y_start, dd, ds; uint8_t *d, *s; uint32_t *cptr, *s24; @@ -440,8 +440,6 @@ static void tcx24_update_display(void *opaque) } page = 0; - page24 = ts->vram24_offset; - cpage = ts->cplane_offset; y_start = -1; page_min = -1; page_max = 0; @@ -453,8 +451,7 @@ static void tcx24_update_display(void *opaque) ds = 1024; memory_region_sync_dirty_bitmap(&ts->vram_mem); - for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE, - page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) { + for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE) { if (tcx_check_dirty(ts, page, TARGET_PAGE_SIZE)) { if (y_start < 0) y_start = y; -- cgit v1.1 From 0a97c6c4f938e0be21546f9475b30953b25187f0 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:47 +0100 Subject: tcx: remove TARGET_PAGE_SIZE from tcx_update_display() Now that page alignment is handled by the memory API, there is no need to duplicate the code 4 times (4 * 1024 == 4096 == TARGET_PAGE_SIZE). Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 36 ++++-------------------------------- 1 file changed, 4 insertions(+), 32 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 4f4f03f..14a17fe 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -363,8 +363,8 @@ static void tcx_update_display(void *opaque) } memory_region_sync_dirty_bitmap(&ts->vram_mem); - for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE) { - if (tcx_check_dirty(ts, page, TARGET_PAGE_SIZE)) { + for (y = 0; y < ts->height; y++, page += ds) { + if (tcx_check_dirty(ts, page, ds)) { if (y_start < 0) y_start = y; if (page < page_min) @@ -376,33 +376,6 @@ static void tcx_update_display(void *opaque) if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { fc(ts, d, y, ts->width); } - d += dd; - s += ds; - y++; - - f(ts, d, s, ts->width); - if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); - } - d += dd; - s += ds; - y++; - - f(ts, d, s, ts->width); - if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); - } - d += dd; - s += ds; - y++; - - f(ts, d, s, ts->width); - if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); - } - d += dd; - s += ds; - y++; } else { if (y_start >= 0) { /* flush to display */ @@ -410,10 +383,9 @@ static void tcx_update_display(void *opaque) ts->width, y - y_start); y_start = -1; } - d += dd * 4; - s += ds * 4; - y += 4; } + s += ds; + d += dd; } if (y_start >= 0) { /* flush to display */ -- cgit v1.1 From d18e101225a83a5fa3a8dd9938a115ca2f06ca83 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:47 +0100 Subject: tcx: remove TARGET_PAGE_SIZE from tcx24_update_display() Now that page alignment is handled by the memory API, there is no need to duplicate the code 4 times (4 * 1024 == 4096 == TARGET_PAGE_SIZE). Finally we have now removed all traces of TARGET_PAGE_SIZE. Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 46 ++++++---------------------------------------- 1 file changed, 6 insertions(+), 40 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 14a17fe..0dd007e 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -25,7 +25,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu-common.h" -#include "cpu.h" /* FIXME shouldn't use TARGET_PAGE_SIZE */ #include "ui/console.h" #include "ui/pixel_ops.h" #include "hw/loader.h" @@ -423,8 +422,8 @@ static void tcx24_update_display(void *opaque) ds = 1024; memory_region_sync_dirty_bitmap(&ts->vram_mem); - for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE) { - if (tcx_check_dirty(ts, page, TARGET_PAGE_SIZE)) { + for (y = 0; y < ts->height; y++, page += ds) { + if (tcx_check_dirty(ts, page, ds)) { if (y_start < 0) y_start = y; if (page < page_min) @@ -435,38 +434,6 @@ static void tcx24_update_display(void *opaque) if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { tcx_draw_cursor32(ts, d, y, ts->width); } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; - tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); - if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { - tcx_draw_cursor32(ts, d, y, ts->width); - } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; - tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); - if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { - tcx_draw_cursor32(ts, d, y, ts->width); - } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; - tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); - if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { - tcx_draw_cursor32(ts, d, y, ts->width); - } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; } else { if (y_start >= 0) { /* flush to display */ @@ -474,12 +441,11 @@ static void tcx24_update_display(void *opaque) ts->width, y - y_start); y_start = -1; } - d += dd * 4; - s += ds * 4; - cptr += ds * 4; - s24 += ds * 4; - y += 4; } + d += dd; + s += ds; + cptr += ds; + s24 += ds; } if (y_start >= 0) { /* flush to display */ -- cgit v1.1 From ee72bed08cc05f086ad1424e47f1b06461650381 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:47 +0100 Subject: tcx: remove primitives for non-32-bit surfaces As all surfaces in QEMU are now either shared or 32-bit ARGB regardless of the guest depth, remove all non-32-bit primitives from tcx_update_display() and consequence their implementation which are no longer required. Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 126 ++++--------------------------------------------------- 1 file changed, 8 insertions(+), 118 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 0dd007e..6da6dfb 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -140,25 +140,12 @@ static void update_palette_entries(TCXState *s, int start, int end) int i; for (i = start; i < end; i++) { - switch (surface_bits_per_pixel(surface)) { - default: - case 8: - s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]); - break; - case 15: - s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]); - break; - case 16: - s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]); - break; - case 32: - if (is_surface_bgr(surface)) { - s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); - } else { - s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); - } - break; + if (is_surface_bgr(surface)) { + s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); + } else { + s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); } + break; } tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); } @@ -176,31 +163,6 @@ static void tcx_draw_line32(TCXState *s1, uint8_t *d, } } -static void tcx_draw_line16(TCXState *s1, uint8_t *d, - const uint8_t *s, int width) -{ - int x; - uint8_t val; - uint16_t *p = (uint16_t *)d; - - for (x = 0; x < width; x++) { - val = *s++; - *p++ = s1->palette[val]; - } -} - -static void tcx_draw_line8(TCXState *s1, uint8_t *d, - const uint8_t *s, int width) -{ - int x; - uint8_t val; - - for(x = 0; x < width; x++) { - val = *s++; - *d++ = s1->palette[val]; - } -} - static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, int y, int width) { @@ -227,57 +189,6 @@ static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, } } -static void tcx_draw_cursor16(TCXState *s1, uint8_t *d, - int y, int width) -{ - int x, len; - uint32_t mask, bits; - uint16_t *p = (uint16_t *)d; - - y = y - s1->cursy; - mask = s1->cursmask[y]; - bits = s1->cursbits[y]; - len = MIN(width - s1->cursx, 32); - p = &p[s1->cursx]; - for (x = 0; x < len; x++) { - if (mask & 0x80000000) { - if (bits & 0x80000000) { - *p = s1->palette[259]; - } else { - *p = s1->palette[258]; - } - } - p++; - mask <<= 1; - bits <<= 1; - } -} - -static void tcx_draw_cursor8(TCXState *s1, uint8_t *d, - int y, int width) -{ - int x, len; - uint32_t mask, bits; - - y = y - s1->cursy; - mask = s1->cursmask[y]; - bits = s1->cursbits[y]; - len = MIN(width - s1->cursx, 32); - d = &d[s1->cursx]; - for (x = 0; x < len; x++) { - if (mask & 0x80000000) { - if (bits & 0x80000000) { - *d = s1->palette[259]; - } else { - *d = s1->palette[258]; - } - } - d++; - mask <<= 1; - bits <<= 1; - } -} - /* XXX Could be much more optimal: * detect if line/page/whole screen is in 24 bit mode @@ -326,10 +237,8 @@ static void tcx_update_display(void *opaque) ram_addr_t page, page_min, page_max; int y, y_start, dd, ds; uint8_t *d, *s; - void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); - void (*fc)(TCXState *s1, uint8_t *dst, int y, int width); - if (surface_bits_per_pixel(surface) == 0) { + if (surface_bits_per_pixel(surface) != 32) { return; } @@ -342,25 +251,6 @@ static void tcx_update_display(void *opaque) dd = surface_stride(surface); ds = 1024; - switch (surface_bits_per_pixel(surface)) { - case 32: - f = tcx_draw_line32; - fc = tcx_draw_cursor32; - break; - case 15: - case 16: - f = tcx_draw_line16; - fc = tcx_draw_cursor16; - break; - default: - case 8: - f = tcx_draw_line8; - fc = tcx_draw_cursor8; - break; - case 0: - return; - } - memory_region_sync_dirty_bitmap(&ts->vram_mem); for (y = 0; y < ts->height; y++, page += ds) { if (tcx_check_dirty(ts, page, ds)) { @@ -371,9 +261,9 @@ static void tcx_update_display(void *opaque) if (page > page_max) page_max = page; - f(ts, d, s, ts->width); + tcx_draw_line32(ts, d, s, ts->width); if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); + tcx_draw_cursor32(ts, d, y, ts->width); } } else { if (y_start >= 0) { -- cgit v1.1 From 973945804d95878375b487c0c5c9b2556c5e4543 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:47 +0100 Subject: tcx: use tcx_set_dirty() for accelerated ops Rather than calling memory_region_set_dirty() directly, make sure that we call tcx_set_dirty() instead. This ensures that the 24-bit plane and cplane are also invalidated correctly. Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 6da6dfb..3f00735 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -525,7 +525,7 @@ static void tcx_stip_writel(void *opaque, hwaddr addr, val <<= 1; } } - memory_region_set_dirty(&s->vram_mem, addr, 32); + tcx_set_dirty(s, addr, 32); } } @@ -558,7 +558,7 @@ static void tcx_rstip_writel(void *opaque, hwaddr addr, val <<= 1; } } - memory_region_set_dirty(&s->vram_mem, addr, 32); + tcx_set_dirty(s, addr, 32); } } @@ -616,7 +616,7 @@ static void tcx_blit_writel(void *opaque, hwaddr addr, memcpy(&s->vram24[addr], &s->vram24[adsr], len * 4); } } - memory_region_set_dirty(&s->vram_mem, addr, len); + tcx_set_dirty(s, addr, len); } } @@ -650,7 +650,7 @@ static void tcx_rblit_writel(void *opaque, hwaddr addr, memcpy(&s->cplane[addr], &s->cplane[adsr], len * 4); } } - memory_region_set_dirty(&s->vram_mem, addr, len); + tcx_set_dirty(s, addr, len); } } @@ -687,7 +687,7 @@ static void tcx_invalidate_cursor_position(TCXState *s) start = ymin * 1024; end = ymax * 1024; - memory_region_set_dirty(&s->vram_mem, start, end-start); + tcx_set_dirty(s, start, end - start); } static uint64_t tcx_thc_readl(void *opaque, hwaddr addr, -- cgit v1.1 From 749763864208b14f100f1f8319aeb931134430fa Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Wed, 5 Apr 2017 09:02:47 +0100 Subject: tcx: switch to load_image_mr() and remove prom_addr hack Previous to the existence of load_image_mr(), the only way to load in the FCode ROM image was to pass in its physical address via qdev properties and use load_image_targphys(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Gerd Hoffmann --- hw/display/tcx.c | 4 +--- hw/sparc/sun4m.c | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) (limited to 'hw') diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 3f00735..5a1115c 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -843,8 +843,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp) vmstate_register_ram_global(&s->rom); fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE); if (fcode_filename) { - ret = load_image_targphys(fcode_filename, s->prom_addr, - FCODE_MAX_ROM_SIZE); + ret = load_image_mr(fcode_filename, &s->rom); g_free(fcode_filename); if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) { error_report("tcx: could not load prom '%s'", TCX_ROM_FILE); @@ -902,7 +901,6 @@ static Property tcx_properties[] = { DEFINE_PROP_UINT16("width", TCXState, width, -1), DEFINE_PROP_UINT16("height", TCXState, height, -1), DEFINE_PROP_UINT16("depth", TCXState, depth, -1), - DEFINE_PROP_UINT64("prom_addr", TCXState, prom_addr, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 7a0922b..5f022cc 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -491,7 +491,6 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width, qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_prop_set_uint64(dev, "prom_addr", addr); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); -- cgit v1.1