From 6ddeb0ec8c29d51be49d5336c6d6508972b6d49c Mon Sep 17 00:00:00 2001 From: Zhao Liu Date: Wed, 24 Apr 2024 23:49:17 +0800 Subject: i386/cpu: Introduce bitmap to cache available CPU topology levels Currently, QEMU checks the specify number of topology domains to detect if there's extended topology levels (e.g., checking nr_dies). With this bitmap, the extended CPU topology (the levels other than SMT, core and package) could be easier to detect without touching the topology details. This is also in preparation for the follow-up to decouple CPUID[0x1F] subleaf with specific topology level. Tested-by: Yongwei Ma Signed-off-by: Zhao Liu Tested-by: Babu Moger Reviewed-by: Xiaoyao Li Message-ID: <20240424154929.1487382-10-zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini --- hw/i386/x86-common.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/i386/x86-common.c b/hw/i386/x86-common.c index 67b03c9..7d4f9b2 100644 --- a/hw/i386/x86-common.c +++ b/hw/i386/x86-common.c @@ -271,7 +271,10 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, init_topo_info(&topo_info, x86ms); - env->nr_dies = ms->smp.dies; + if (ms->smp.dies > 1) { + env->nr_dies = ms->smp.dies; + set_bit(CPU_TOPO_LEVEL_DIE, env->avail_cpu_topo); + } /* * If APIC ID is not set, -- cgit v1.1