From 668351a54883b6283e7ae94daf4d4eca1a071158 Mon Sep 17 00:00:00 2001 From: Xuzhou Cheng Date: Wed, 3 Mar 2021 21:52:52 +0800 Subject: hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream link of GQSPI to CSU DMA. Signed-off-by: Xuzhou Cheng Signed-off-by: Bin Meng Reviewed-by: Edgar E. Iglesias Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com Signed-off-by: Peter Maydell --- hw/arm/Kconfig | 1 + hw/arm/xlnx-zynqmp.c | 12 ++++++++++++ 2 files changed, 13 insertions(+) (limited to 'hw') diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index f2b7a8f..8c37cf0 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -353,6 +353,7 @@ config XLNX_ZYNQMP_ARM select SSI_M25P80 select XILINX_AXI select XILINX_SPIPS + select XLNX_CSU_DMA select XLNX_ZYNQMP select XLNX_ZDMA diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index e2056a7..7f01284 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -50,6 +50,7 @@ #define QSPI_ADDR 0xff0f0000 #define LQSPI_ADDR 0xc0000000 #define QSPI_IRQ 15 +#define QSPI_DMA_ADDR 0xff0f0800 #define DP_ADDR 0xfd4a0000 #define DP_IRQ 113 @@ -284,6 +285,8 @@ static void xlnx_zynqmp_init(Object *obj) for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) { object_initialize_child(obj, "adma[*]", &s->adma[i], TYPE_XLNX_ZDMA); } + + object_initialize_child(obj, "qspi-dma", &s->qspi_dma, TYPE_XLNX_CSU_DMA); } static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) @@ -638,6 +641,15 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0, gic_spi[adma_ch_intr[i]]); } + + if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi_dma), errp)) { + return; + } + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi_dma), 0, QSPI_DMA_ADDR); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi_dma), 0, gic_spi[QSPI_IRQ]); + object_property_set_link(OBJECT(&s->qspi), "stream-connected-dma", + OBJECT(&s->qspi_dma), errp); } static Property xlnx_zynqmp_props[] = { -- cgit v1.1