From 55e5c2850293547203874098f7cec148ffd12dfa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Mon, 17 Dec 2012 06:18:02 +0100 Subject: cpu: Move cpu_index field to CPUState MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber --- hw/alpha_typhoon.c | 4 +++- hw/arm_gic.c | 3 ++- hw/arm_mptimer.c | 8 +++++--- hw/openpic.c | 5 ++++- hw/ppc/e500.c | 17 +++++++++++------ hw/ppce500_spin.c | 8 +++++--- hw/pxa.h | 2 +- hw/pxa2xx.c | 4 ++-- hw/pxa2xx_gpio.c | 5 +++-- hw/spapr.c | 11 ++++++----- hw/spapr_hcall.c | 4 +++- hw/spapr_rtas.c | 8 +++++--- hw/xics.c | 22 ++++++++++++---------- 13 files changed, 62 insertions(+), 39 deletions(-) (limited to 'hw') diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c index dafb35d..bf9aabf 100644 --- a/hw/alpha_typhoon.c +++ b/hw/alpha_typhoon.c @@ -75,6 +75,7 @@ static uint64_t cchip_read(void *opaque, hwaddr addr, unsigned size) { CPUAlphaState *env = cpu_single_env; TyphoonState *s = opaque; + CPUState *cpu; uint64_t ret = 0; if (addr & 4) { @@ -95,7 +96,8 @@ static uint64_t cchip_read(void *opaque, hwaddr addr, unsigned size) case 0x0080: /* MISC: Miscellaneous Register. */ - ret = s->cchip.misc | (env->cpu_index & 3); + cpu = ENV_GET_CPU(env); + ret = s->cchip.misc | (cpu->cpu_index & 3); break; case 0x00c0: diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 466dbf7..90e43d0 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -39,7 +39,8 @@ static const uint8_t gic_id[] = { static inline int gic_get_current_cpu(GICState *s) { if (s->num_cpu > 1) { - return cpu_single_env->cpu_index; + CPUState *cpu = ENV_GET_CPU(cpu_single_env); + return cpu->cpu_index; } return 0; } diff --git a/hw/arm_mptimer.c b/hw/arm_mptimer.c index 0cd3853..cdfd623 100644 --- a/hw/arm_mptimer.c +++ b/hw/arm_mptimer.c @@ -49,11 +49,13 @@ typedef struct { static inline int get_current_cpu(arm_mptimer_state *s) { - if (cpu_single_env->cpu_index >= s->num_cpu) { + CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env); + + if (cpu_single_cpu->cpu_index >= s->num_cpu) { hw_error("arm_mptimer: num-cpu %d but this cpu is %d!\n", - s->num_cpu, cpu_single_env->cpu_index); + s->num_cpu, cpu_single_cpu->cpu_index); } - return cpu_single_env->cpu_index; + return cpu_single_cpu->cpu_index; } static inline void timerblock_update_irq(timerblock *tb) diff --git a/hw/openpic.c b/hw/openpic.c index 23fa8f9..f6cc07b 100644 --- a/hw/openpic.c +++ b/hw/openpic.c @@ -153,11 +153,14 @@ static const int debug_openpic = 0; static int get_current_cpu(void) { + CPUState *cpu_single_cpu; + if (!cpu_single_env) { return -1; } - return cpu_single_env->cpu_index; + cpu_single_cpu = ENV_GET_CPU(cpu_single_env); + return cpu_single_cpu->cpu_index; } static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr, diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 3a9e1c7..7b3e2e6 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -239,25 +239,28 @@ static int ppce500_load_device_tree(CPUPPCState *env, /* We need to generate the cpu nodes in reverse order, so Linux can pick the first node as boot node and be happy */ for (i = smp_cpus - 1; i >= 0; i--) { + CPUState *cpu = NULL; char cpu_name[128]; uint64_t cpu_release_addr = MPC8544_SPIN_BASE + (i * 0x20); for (env = first_cpu; env != NULL; env = env->next_cpu) { - if (env->cpu_index == i) { + cpu = ENV_GET_CPU(env); + if (cpu->cpu_index == i) { break; } } - if (!env) { + if (cpu == NULL) { continue; } - snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", env->cpu_index); + snprintf(cpu_name, sizeof(cpu_name), "/cpus/PowerPC,8544@%x", + cpu->cpu_index); qemu_devtree_add_subnode(fdt, cpu_name); qemu_devtree_setprop_cell(fdt, cpu_name, "clock-frequency", clock_freq); qemu_devtree_setprop_cell(fdt, cpu_name, "timebase-frequency", tb_freq); qemu_devtree_setprop_string(fdt, cpu_name, "device_type", "cpu"); - qemu_devtree_setprop_cell(fdt, cpu_name, "reg", env->cpu_index); + qemu_devtree_setprop_cell(fdt, cpu_name, "reg", cpu->cpu_index); qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-line-size", env->dcache_line_size); qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-line-size", @@ -265,7 +268,7 @@ static int ppce500_load_device_tree(CPUPPCState *env, qemu_devtree_setprop_cell(fdt, cpu_name, "d-cache-size", 0x8000); qemu_devtree_setprop_cell(fdt, cpu_name, "i-cache-size", 0x8000); qemu_devtree_setprop_cell(fdt, cpu_name, "bus-frequency", 0); - if (env->cpu_index) { + if (cpu->cpu_index) { qemu_devtree_setprop_string(fdt, cpu_name, "status", "disabled"); qemu_devtree_setprop_string(fdt, cpu_name, "enable-method", "spin-table"); qemu_devtree_setprop_u64(fdt, cpu_name, "cpu-release-addr", @@ -479,6 +482,7 @@ void ppce500_init(PPCE500Params *params) irqs[0] = g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); for (i = 0; i < smp_cpus; i++) { PowerPCCPU *cpu; + CPUState *cs; qemu_irq *input; cpu = cpu_ppc_init(params->cpu_model); @@ -487,6 +491,7 @@ void ppce500_init(PPCE500Params *params) exit(1); } env = &cpu->env; + cs = CPU(cpu); if (!firstenv) { firstenv = env; @@ -496,7 +501,7 @@ void ppce500_init(PPCE500Params *params) input = (qemu_irq *)env->irq_inputs; irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT]; irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT]; - env->spr[SPR_BOOKE_PIR] = env->cpu_index = i; + env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i; env->mpic_iack = MPC8544_CCSRBAR_BASE + MPC8544_MPIC_REGS_OFFSET + 0x200A0; diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c index 1b2c34f..4c206e2 100644 --- a/hw/ppce500_spin.c +++ b/hw/ppce500_spin.c @@ -124,21 +124,23 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value, SpinState *s = opaque; int env_idx = addr / sizeof(SpinInfo); CPUPPCState *env; + CPUState *cpu = NULL; SpinInfo *curspin = &s->spin[env_idx]; uint8_t *curspin_p = (uint8_t*)curspin; for (env = first_cpu; env != NULL; env = env->next_cpu) { - if (env->cpu_index == env_idx) { + cpu = CPU(ppc_env_get_cpu(env)); + if (cpu->cpu_index == env_idx) { break; } } - if (!env) { + if (cpu == NULL) { /* Unknown CPU */ return; } - if (!env->cpu_index) { + if (cpu->cpu_index == 0) { /* primary CPU doesn't spin */ return; } diff --git a/hw/pxa.h b/hw/pxa.h index c2577d1..668232c 100644 --- a/hw/pxa.h +++ b/hw/pxa.h @@ -69,7 +69,7 @@ DeviceState *pxa2xx_pic_init(hwaddr base, ARMCPU *cpu); /* pxa2xx_gpio.c */ DeviceState *pxa2xx_gpio_init(hwaddr base, - CPUARMState *env, DeviceState *pic, int lines); + ARMCPU *cpu, DeviceState *pic, int lines); void pxa2xx_gpio_read_notifier(DeviceState *dev, qemu_irq handler); /* pxa2xx_dma.c */ diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index f3dffef..492805f 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -2045,7 +2045,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space, qdev_get_gpio_in(s->pic, PXA27X_PIC_OST_4_11), NULL); - s->gpio = pxa2xx_gpio_init(0x40e00000, &s->cpu->env, s->pic, 121); + s->gpio = pxa2xx_gpio_init(0x40e00000, s->cpu, s->pic, 121); dinfo = drive_get(IF_SD, 0, 0); if (!dinfo) { @@ -2176,7 +2176,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size) qdev_get_gpio_in(s->pic, PXA2XX_PIC_OST_0 + 3), NULL); - s->gpio = pxa2xx_gpio_init(0x40e00000, &s->cpu->env, s->pic, 85); + s->gpio = pxa2xx_gpio_init(0x40e00000, s->cpu, s->pic, 85); dinfo = drive_get(IF_SD, 0, 0); if (!dinfo) { diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index 016833d..c02c295 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -250,13 +250,14 @@ static const MemoryRegionOps pxa_gpio_ops = { }; DeviceState *pxa2xx_gpio_init(hwaddr base, - CPUARMState *env, DeviceState *pic, int lines) + ARMCPU *cpu, DeviceState *pic, int lines) { + CPUState *cs = CPU(cpu); DeviceState *dev; dev = qdev_create(NULL, "pxa2xx-gpio"); qdev_prop_set_int32(dev, "lines", lines); - qdev_prop_set_int32(dev, "ncpu", env->cpu_index); + qdev_prop_set_int32(dev, "ncpu", cs->cpu_index); qdev_init_nofail(dev); sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); diff --git a/hw/spapr.c b/hw/spapr.c index a61c71e..76aa09b 100644 --- a/hw/spapr.c +++ b/hw/spapr.c @@ -148,20 +148,20 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr) assert(spapr->cpu_model); for (env = first_cpu; env != NULL; env = env->next_cpu) { - cpu = ENV_GET_CPU(env); + cpu = CPU(ppc_env_get_cpu(env)); uint32_t associativity[] = {cpu_to_be32(0x5), cpu_to_be32(0x0), cpu_to_be32(0x0), cpu_to_be32(0x0), cpu_to_be32(cpu->numa_node), - cpu_to_be32(env->cpu_index)}; + cpu_to_be32(cpu->cpu_index)}; - if ((env->cpu_index % smt) != 0) { + if ((cpu->cpu_index % smt) != 0) { continue; } snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, - env->cpu_index); + cpu->cpu_index); offset = fdt_path_offset(fdt, cpu_model); if (offset < 0) { @@ -310,7 +310,8 @@ static void *spapr_create_fdt_skel(const char *cpu_model, spapr->cpu_model = g_strdup(modelname); for (env = first_cpu; env != NULL; env = env->next_cpu) { - int index = env->cpu_index; + CPUState *cpu = CPU(ppc_env_get_cpu(env)); + int index = cpu->cpu_index; uint32_t servers_prop[smp_threads]; uint32_t gservers_prop[smp_threads * 2]; char *nodename; diff --git a/hw/spapr_hcall.c b/hw/spapr_hcall.c index afb1297..2889742 100644 --- a/hw/spapr_hcall.c +++ b/hw/spapr_hcall.c @@ -467,9 +467,11 @@ static target_ulong h_register_vpa(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong vpa = args[2]; target_ulong ret = H_PARAMETER; CPUPPCState *tenv; + CPUState *tcpu; for (tenv = first_cpu; tenv; tenv = tenv->next_cpu) { - if (tenv->cpu_index == procno) { + tcpu = CPU(ppc_env_get_cpu(tenv)); + if (tcpu->cpu_index == procno) { break; } } diff --git a/hw/spapr_rtas.c b/hw/spapr_rtas.c index 81eecd0..5ec787f 100644 --- a/hw/spapr_rtas.c +++ b/hw/spapr_rtas.c @@ -131,6 +131,7 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr, { target_ulong id; CPUPPCState *env; + CPUState *cpu; if (nargs != 1 || nret != 2) { rtas_st(rets, 0, -3); @@ -139,7 +140,8 @@ static void rtas_query_cpu_stopped_state(sPAPREnvironment *spapr, id = rtas_ld(args, 0); for (env = first_cpu; env; env = env->next_cpu) { - if (env->cpu_index != id) { + cpu = CPU(ppc_env_get_cpu(env)); + if (cpu->cpu_index != id) { continue; } @@ -176,9 +178,9 @@ static void rtas_start_cpu(sPAPREnvironment *spapr, r3 = rtas_ld(args, 2); for (env = first_cpu; env; env = env->next_cpu) { - cpu = ENV_GET_CPU(env); + cpu = CPU(ppc_env_get_cpu(env)); - if (env->cpu_index != id) { + if (cpu->cpu_index != id) { continue; } diff --git a/hw/xics.c b/hw/xics.c index 55899ce..9ef0d61 100644 --- a/hw/xics.c +++ b/hw/xics.c @@ -357,10 +357,10 @@ void xics_set_irq_type(struct icp_state *icp, int irq, bool lsi) static target_ulong h_cppr(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { - CPUPPCState *env = &cpu->env; + CPUState *cs = CPU(cpu); target_ulong cppr = args[0]; - icp_set_cppr(spapr->icp, env->cpu_index, cppr); + icp_set_cppr(spapr->icp, cs->cpu_index, cppr); return H_SUCCESS; } @@ -376,14 +376,13 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPREnvironment *spapr, icp_set_mfrr(spapr->icp, server, mfrr); return H_SUCCESS; - } static target_ulong h_xirr(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { - CPUPPCState *env = &cpu->env; - uint32_t xirr = icp_accept(spapr->icp->ss + env->cpu_index); + CPUState *cs = CPU(cpu); + uint32_t xirr = icp_accept(spapr->icp->ss + cs->cpu_index); args[0] = xirr; return H_SUCCESS; @@ -392,10 +391,10 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPREnvironment *spapr, static target_ulong h_eoi(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { - CPUPPCState *env = &cpu->env; + CPUState *cs = CPU(cpu); target_ulong xirr = args[0]; - icp_eoi(spapr->icp, env->cpu_index, xirr); + icp_eoi(spapr->icp, cs->cpu_index, xirr); return H_SUCCESS; } @@ -525,14 +524,16 @@ static void xics_reset(void *opaque) struct icp_state *xics_system_init(int nr_irqs) { CPUPPCState *env; + CPUState *cpu; int max_server_num; struct icp_state *icp; struct ics_state *ics; max_server_num = -1; for (env = first_cpu; env != NULL; env = env->next_cpu) { - if (env->cpu_index > max_server_num) { - max_server_num = env->cpu_index; + cpu = CPU(ppc_env_get_cpu(env)); + if (cpu->cpu_index > max_server_num) { + max_server_num = cpu->cpu_index; } } @@ -541,7 +542,8 @@ struct icp_state *xics_system_init(int nr_irqs) icp->ss = g_malloc0(icp->nr_servers*sizeof(struct icp_server_state)); for (env = first_cpu; env != NULL; env = env->next_cpu) { - struct icp_server_state *ss = &icp->ss[env->cpu_index]; + cpu = CPU(ppc_env_get_cpu(env)); + struct icp_server_state *ss = &icp->ss[cpu->cpu_index]; switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_POWER7: -- cgit v1.1