From 7aca3782d93d96cc5e123617d9e1de783365d4dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 22 Nov 2019 14:36:23 +0100 Subject: hw/display/sm501: Always map the UART0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The SM501 is a Mobile Multimedia Companion Chip with 2 UARTs. This model only implements the first UART. Being part of the chipset, the UART block is always mapped in memory, regardless of whether we provide a chardev backend. Since commit 12051d82f, qemu_chr_fe_init() accepts a NULL chardev. Let's remove the chardev check and always map the UART in the chipset memory. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191122133623.13004-1-philmd@redhat.com> Reviewed-by: Peter Maydell --- hw/display/sm501.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 1f33c87..79bd7bc 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1958,11 +1958,9 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); /* bridge to serial emulation module */ - if (s->chr_state) { - serial_mm_init(&s->state.mmio_region, SM501_UART0, 2, - NULL, /* TODO : chain irq to IRL */ - 115200, s->chr_state, DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(&s->state.mmio_region, SM501_UART0, 2, + NULL, /* TODO : chain irq to IRL */ + 115200, s->chr_state, DEVICE_LITTLE_ENDIAN); } static Property sm501_sysbus_properties[] = { -- cgit v1.1 From 7e83a77f96ee18cb891f309dc617caa5e07ff51e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 19:18:12 +0200 Subject: sysbus: remove unused sysbus_try_create* MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/core/sysbus.c | 32 -------------------------------- hw/i386/pc.c | 1 - 2 files changed, 33 deletions(-) (limited to 'hw') diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 9e69c83..08b0311 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -250,38 +250,6 @@ DeviceState *sysbus_create_varargs(const char *name, return dev; } -DeviceState *sysbus_try_create_varargs(const char *name, - hwaddr addr, ...) -{ - DeviceState *dev; - SysBusDevice *s; - va_list va; - qemu_irq irq; - int n; - - dev = qdev_try_create(NULL, name); - if (!dev) { - return NULL; - } - s = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); - if (addr != (hwaddr)-1) { - sysbus_mmio_map(s, 0, addr); - } - va_start(va, addr); - n = 0; - while (1) { - irq = va_arg(va, qemu_irq); - if (!irq) { - break; - } - sysbus_connect_irq(s, n, irq); - n++; - } - va_end(va); - return dev; -} - static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent) { SysBusDevice *s = SYS_BUS_DEVICE(dev); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 42014b0..a4fda69 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1198,7 +1198,6 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, * when the HPET wants to take over. Thus we have to disable the latter. */ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { - /* In order to set property, here not using sysbus_try_create_simple */ hpet = qdev_try_create(NULL, TYPE_HPET); if (hpet) { /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 -- cgit v1.1 From 4305d4825c729222926ef498189e03cdccf125ae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 23:31:20 +0200 Subject: serial-pci-multi: factor out multi_serial_get_port_count() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Common function to be reused in next patch. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial-pci-multi.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'hw') diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 5f13b56..5c553c3 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -77,33 +77,34 @@ static void multi_serial_irq_mux(void *opaque, int n, int level) pci_set_irq(&pci->dev, pending); } +static size_t multi_serial_get_port_count(PCIDeviceClass *pc) +{ + switch (pc->device_id) { + case 0x0003: + return 2; + case 0x0004: + return 4; + } + + g_assert_not_reached(); +} + + static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) { PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); SerialState *s; Error *err = NULL; - int i, nr_ports = 0; - - switch (pc->device_id) { - case 0x0003: - nr_ports = 2; - break; - case 0x0004: - nr_ports = 4; - break; - } - assert(nr_ports > 0); - assert(nr_ports <= PCI_SERIAL_MAX_PORTS); + size_t i, nports = multi_serial_get_port_count(pc); pci->dev.config[PCI_CLASS_PROG] = pci->prog_if; pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; - memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nr_ports); + memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports); pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); - pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, - nr_ports); + pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, nports); - for (i = 0; i < nr_ports; i++) { + for (i = 0; i < nports; i++) { s = pci->state + i; s->baudbase = 115200; serial_realize_core(s, &err); @@ -113,7 +114,7 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) return; } s->irq = pci->irqs[i]; - pci->name[i] = g_strdup_printf("uart #%d", i + 1); + pci->name[i] = g_strdup_printf("uart #%zu", i + 1); memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, pci->name[i], 8); memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); -- cgit v1.1 From 7781b88ee458ff933459503ade0b0a6ddaad08de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 23:32:12 +0200 Subject: serial: initial qom-ification MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make SerialState a device (the following patches will introduce IO/MM sysbus serial devices) None of the serial_{,mm}_init() callers actually free the returned value (even if they did, it would be quite harmless), so we can change the object allocation at will. However, the devices that embed SerialState must now have their field QOM-initialized manually (isa, pci, pci-multi). Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/serial-isa.c | 9 +++++++++ hw/char/serial-pci-multi.c | 15 +++++++++++++++ hw/char/serial-pci.c | 13 ++++++++++++- hw/char/serial.c | 34 ++++++++++++++++++++++++++++------ 4 files changed, 64 insertions(+), 7 deletions(-) (limited to 'hw') diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 9e31c51..9a5928b 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -111,10 +111,19 @@ static void serial_isa_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } +static void serial_isa_initfn(Object *o) +{ + ISASerialState *self = ISA_SERIAL(o); + + object_initialize_child(o, "serial", &self->state, sizeof(self->state), + TYPE_SERIAL, &error_abort, NULL); +} + static const TypeInfo serial_isa_info = { .name = TYPE_ISA_SERIAL, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(ISASerialState), + .instance_init = serial_isa_initfn, .class_init = serial_isa_class_initfn, }; diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 5c553c3..edfbfdc 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -181,10 +181,24 @@ static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } +static void multi_serial_init(Object *o) +{ + PCIDevice *dev = PCI_DEVICE(o); + PCIMultiSerialState *pms = DO_UPCAST(PCIMultiSerialState, dev, dev); + size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev)); + + for (i = 0; i < nports; i++) { + object_initialize_child(o, "serial[*]", &pms->state[i], + sizeof(pms->state[i]), + TYPE_SERIAL, &error_abort, NULL); + } +} + static const TypeInfo multi_2x_serial_pci_info = { .name = "pci-serial-2x", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), + .instance_init = multi_serial_init, .class_init = multi_2x_serial_pci_class_initfn, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, @@ -196,6 +210,7 @@ static const TypeInfo multi_4x_serial_pci_info = { .name = "pci-serial-4x", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), + .instance_init = multi_serial_init, .class_init = multi_4x_serial_pci_class_initfn, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index cb9b76e..f99b6c1 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -40,6 +40,8 @@ typedef struct PCISerialState { uint8_t prog_if; } PCISerialState; +#define TYPE_PCI_SERIAL "pci-serial" +#define PCI_SERIAL(s) OBJECT_CHECK(PCISerialState, (s), TYPE_PCI_SERIAL) static void serial_pci_realize(PCIDevice *dev, Error **errp) { @@ -103,10 +105,19 @@ static void serial_pci_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } +static void serial_pci_init(Object *o) +{ + PCISerialState *ps = PCI_SERIAL(o); + + object_initialize_child(o, "serial", &ps->state, sizeof(ps->state), + TYPE_SERIAL, &error_abort, NULL); +} + static const TypeInfo serial_pci_info = { - .name = "pci-serial", + .name = TYPE_PCI_SERIAL, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), + .instance_init = serial_pci_init, .class_init = serial_pci_class_initfn, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/char/serial.c b/hw/char/serial.c index b4aa250..233a9e2 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -983,9 +983,8 @@ const MemoryRegionOps serial_io_ops = { SerialState *serial_init(int base, qemu_irq irq, int baudbase, Chardev *chr, MemoryRegion *system_io) { - SerialState *s; - - s = g_malloc0(sizeof(SerialState)); + DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); + SerialState *s = SERIAL(dev); s->irq = irq; s->baudbase = baudbase; @@ -993,6 +992,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, serial_realize_core(s, &error_fatal); vmstate_register(NULL, base, &vmstate_serial, s); + qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); memory_region_add_subregion(system_io, base, &s->io); @@ -1000,6 +1000,21 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, return s; } +static void serial_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + /* internal device for serialio/serialmm, not user-creatable */ + dc->user_creatable = false; +} + +static const TypeInfo serial_info = { + .name = TYPE_SERIAL, + .parent = TYPE_DEVICE, + .instance_size = sizeof(SerialState), + .class_init = serial_class_init, +}; + /* Memory mapped interface */ static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size) @@ -1045,9 +1060,8 @@ SerialState *serial_mm_init(MemoryRegion *address_space, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { - SerialState *s; - - s = g_malloc0(sizeof(SerialState)); + DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); + SerialState *s = SERIAL(dev); s->it_shift = it_shift; s->irq = irq; @@ -1056,9 +1070,17 @@ SerialState *serial_mm_init(MemoryRegion *address_space, serial_realize_core(s, &error_fatal); vmstate_register(NULL, base, &vmstate_serial, s); + qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s, "serial", 8 << it_shift); memory_region_add_subregion(address_space, base, &s->io); return s; } + +static void serial_register_types(void) +{ + type_register_static(&serial_info); +} + +type_init(serial_register_types) -- cgit v1.1 From 4cc017e505df7e5344e4dfe7fc17711117c5f11f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 00:32:41 +0200 Subject: serial: register vmsd with DeviceClass MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Migration from old to new code works, however the other way fails for devices that use serial_init/serial_mm_init with "base", used as instance_id previously. (with qdev_set_legacy_instance_id, the alias_id is only used in savevm.c:find_se(), and thus can only be used to match against "legacy" instance id values. On new code, instance_id is generated incrementally from 0 with calculate_new_instance_id(), based on "qdev-path/vmsd-name") Signed-off-by: Marc-André Lureau Reviewed-by: xiaoqiang zhao --- hw/char/serial.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index 233a9e2..e926845 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -990,8 +990,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, s->baudbase = baudbase; qemu_chr_fe_init(&s->chr, chr, &error_abort); serial_realize_core(s, &error_fatal); - - vmstate_register(NULL, base, &vmstate_serial, s); + qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); @@ -1006,6 +1005,7 @@ static void serial_class_init(ObjectClass *klass, void *data) /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; + dc->vmsd = &vmstate_serial; } static const TypeInfo serial_info = { @@ -1069,7 +1069,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, qemu_chr_fe_init(&s->chr, chr, &error_abort); serial_realize_core(s, &error_fatal); - vmstate_register(NULL, base, &vmstate_serial, s); + qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s, -- cgit v1.1 From ff22c588f474c6799015365d25548ab845a4f5cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 00:32:57 +0200 Subject: serial: add "chardev" property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is more QOM-friendly, callers may set/get the property themself. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/serial.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index e926845..1746dbc 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -34,6 +34,7 @@ #include "sysemu/runstate.h" #include "qemu/error-report.h" #include "trace.h" +#include "hw/qdev-properties.h" //#define DEBUG_SERIAL @@ -988,7 +989,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, s->irq = irq; s->baudbase = baudbase; - qemu_chr_fe_init(&s->chr, chr, &error_abort); + qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); @@ -999,13 +1000,19 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, return s; } -static void serial_class_init(ObjectClass *klass, void *data) +static Property serial_properties[] = { + DEFINE_PROP_CHR("chardev", SerialState, chr), + DEFINE_PROP_END_OF_LIST(), +}; + +static void serial_class_init(ObjectClass *klass, void* data) { DeviceClass *dc = DEVICE_CLASS(klass); /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; dc->vmsd = &vmstate_serial; + dc->props = serial_properties; } static const TypeInfo serial_info = { @@ -1066,7 +1073,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->it_shift = it_shift; s->irq = irq; s->baudbase = baudbase; - qemu_chr_fe_init(&s->chr, chr, &error_abort); + qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); -- cgit v1.1 From 96651db423a0a25466629d35c775531f5145a66a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 00:35:36 +0200 Subject: serial: add "baudbase" property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/serial-isa.c | 1 - hw/char/serial-pci-multi.c | 1 - hw/char/serial-pci.c | 1 - hw/char/serial.c | 5 +++-- 4 files changed, 3 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 9a5928b..2a4c8de 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -73,7 +73,6 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp) } index++; - s->baudbase = 115200; isa_init_irq(isadev, &s->irq, isa->isairq); serial_realize_core(s, errp); qdev_set_legacy_instance_id(dev, isa->iobase, 3); diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index edfbfdc..4891f32 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -106,7 +106,6 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) for (i = 0; i < nports; i++) { s = pci->state + i; - s->baudbase = 115200; serial_realize_core(s, &err); if (err != NULL) { error_propagate(errp, err); diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index f99b6c1..db2c17a 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -49,7 +49,6 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp) SerialState *s = &pci->state; Error *err = NULL; - s->baudbase = 115200; serial_realize_core(s, &err); if (err != NULL) { error_propagate(errp, err); diff --git a/hw/char/serial.c b/hw/char/serial.c index 1746dbc..a4f0566 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -988,7 +988,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, SerialState *s = SERIAL(dev); s->irq = irq; - s->baudbase = baudbase; + qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); @@ -1002,6 +1002,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, static Property serial_properties[] = { DEFINE_PROP_CHR("chardev", SerialState, chr), + DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200), DEFINE_PROP_END_OF_LIST(), }; @@ -1072,7 +1073,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->it_shift = it_shift; s->irq = irq; - s->baudbase = baudbase; + qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); -- cgit v1.1 From c9808d602813bce4fada7bf9ecc463aa779b73f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 01:02:50 +0200 Subject: serial: realize the serial device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of calling serial_realize_core(), use the QDev realize callback. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial-isa.c | 2 +- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 8 ++++---- 4 files changed, 7 insertions(+), 7 deletions(-) (limited to 'hw') diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 2a4c8de..db86445 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -74,7 +74,7 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp) index++; isa_init_irq(isadev, &s->irq, isa->isairq); - serial_realize_core(s, errp); + object_property_set_bool(OBJECT(s), true, "realized", errp); qdev_set_legacy_instance_id(dev, isa->iobase, 3); memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8); diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 4891f32..0e1fdb7 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -106,7 +106,7 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) for (i = 0; i < nports; i++) { s = pci->state + i; - serial_realize_core(s, &err); + object_property_set_bool(OBJECT(s), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); multi_serial_pci_exit(dev); diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index db2c17a..4b6a217 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -49,7 +49,7 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp) SerialState *s = &pci->state; Error *err = NULL; - serial_realize_core(s, &err); + object_property_set_bool(OBJECT(s), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/char/serial.c b/hw/char/serial.c index a4f0566..8328cc6 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -934,8 +934,10 @@ static int serial_be_change(void *opaque) return 0; } -void serial_realize_core(SerialState *s, Error **errp) +static void serial_realize(DeviceState *dev, Error **errp) { + SerialState *s = SERIAL(dev); + s->modem_status_poll = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *) serial_update_msl, s); s->fifo_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *) fifo_timeout_int, s); @@ -990,7 +992,6 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, s->irq = irq; qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); - serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); @@ -1012,6 +1013,7 @@ static void serial_class_init(ObjectClass *klass, void* data) /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; + dc->realize = serial_realize; dc->vmsd = &vmstate_serial; dc->props = serial_properties; } @@ -1075,8 +1077,6 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->irq = irq; qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); - - serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); -- cgit v1.1 From b9975000a008c5b0801e3d24ed113a1bd2767ed5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 01:14:43 +0200 Subject: serial: replace serial_exit_core() with unrealize MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of calling serial_exit_core() directly, use the QDev unrealize callback. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 5 ++++- 3 files changed, 6 insertions(+), 3 deletions(-) (limited to 'hw') diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 0e1fdb7..e343a12 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -56,7 +56,7 @@ static void multi_serial_pci_exit(PCIDevice *dev) for (i = 0; i < pci->ports; i++) { s = pci->state + i; - serial_exit_core(s); + object_property_set_bool(OBJECT(s), false, "realized", NULL); memory_region_del_subregion(&pci->iobar, &s->io); g_free(pci->name[i]); } diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 4b6a217..b6a73c6 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -68,7 +68,7 @@ static void serial_pci_exit(PCIDevice *dev) PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); SerialState *s = &pci->state; - serial_exit_core(s); + object_property_set_bool(OBJECT(s), false, "realized", NULL); qemu_free_irq(s->irq); } diff --git a/hw/char/serial.c b/hw/char/serial.c index 8328cc6..ec388f3 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -950,8 +950,10 @@ static void serial_realize(DeviceState *dev, Error **errp) serial_reset(s); } -void serial_exit_core(SerialState *s) +static void serial_unrealize(DeviceState *dev, Error **errp) { + SerialState *s = SERIAL(dev); + qemu_chr_fe_deinit(&s->chr, false); timer_del(s->modem_status_poll); @@ -1014,6 +1016,7 @@ static void serial_class_init(ObjectClass *klass, void* data) /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; dc->realize = serial_realize; + dc->unrealize = serial_unrealize; dc->vmsd = &vmstate_serial; dc->props = serial_properties; } -- cgit v1.1 From 490a9d9b36bfa22a6b46b27e6e9e84e1bac44c68 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 17:50:06 +0200 Subject: serial: start making SerialMM a sysbus device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Memory mapped serial device is in fact a sysbus device. The following patches will make use of sysbus facilities for resource and registration. In particular, "serial-mm: use sysbus facilities" will move internal serial realization to serial_mm_realize callback to follow qdev best practices. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/omap_uart.c | 2 +- hw/char/serial.c | 72 +++++++++++++++++++++++++++++++++++++++------------- hw/mips/boston.c | 2 +- hw/mips/mips_malta.c | 2 +- 4 files changed, 58 insertions(+), 20 deletions(-) (limited to 'hw') diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c index 13e4f43..e8da933 100644 --- a/hw/char/omap_uart.c +++ b/hw/char/omap_uart.c @@ -27,7 +27,7 @@ struct omap_uart_s { MemoryRegion iomem; hwaddr base; - SerialState *serial; /* TODO */ + SerialMM *serial; /* TODO */ struct omap_target_agent_s *ta; omap_clk fclk; qemu_irq irq; diff --git a/hw/char/serial.c b/hw/char/serial.c index ec388f3..8243908 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1032,16 +1032,28 @@ static const TypeInfo serial_info = { static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size) { - SerialState *s = opaque; - return serial_ioport_read(s, addr >> s->it_shift, 1); + SerialMM *s = SERIAL_MM(opaque); + return serial_ioport_read(&s->serial, addr >> s->it_shift, 1); } static void serial_mm_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - SerialState *s = opaque; + SerialMM *s = SERIAL_MM(opaque); value &= 255; - serial_ioport_write(s, addr >> s->it_shift, value, 1); + serial_ioport_write(&s->serial, addr >> s->it_shift, value, 1); +} + +static void serial_mm_realize(DeviceState *dev, Error **errp) +{ + SerialMM *s = SERIAL_MM(dev); + Error *local_err = NULL; + + object_property_set_bool(OBJECT(&s->serial), true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } } static const MemoryRegionOps serial_mm_ops[3] = { @@ -1068,30 +1080,56 @@ static const MemoryRegionOps serial_mm_ops[3] = { }, }; -SerialState *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, - qemu_irq irq, int baudbase, - Chardev *chr, enum device_endian end) +SerialMM *serial_mm_init(MemoryRegion *address_space, + hwaddr base, int it_shift, + qemu_irq irq, int baudbase, + Chardev *chr, enum device_endian end) { - DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); - SerialState *s = SERIAL(dev); + SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); + SerialState *s = &smm->serial; - s->it_shift = it_shift; + smm->it_shift = it_shift; s->irq = irq; - qdev_prop_set_uint32(dev, "baudbase", baudbase); - qdev_prop_set_chr(dev, "chardev", chr); - qdev_set_legacy_instance_id(dev, base, 2); - qdev_init_nofail(dev); + qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); + qdev_prop_set_chr(DEVICE(s), "chardev", chr); + qdev_set_legacy_instance_id(DEVICE(s), base, 2); - memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s, + qdev_init_nofail(DEVICE(smm)); + + memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], smm, "serial", 8 << it_shift); memory_region_add_subregion(address_space, base, &s->io); - return s; + + return smm; +} + +static void serial_mm_instance_init(Object *o) +{ + SerialMM *smm = SERIAL_MM(o); + + object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), + TYPE_SERIAL, &error_abort, NULL); } +static void serial_mm_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + + dc->realize = serial_mm_realize; +} + +static const TypeInfo serial_mm_info = { + .name = TYPE_SERIAL_MM, + .parent = TYPE_SYS_BUS_DEVICE, + .class_init = serial_mm_class_init, + .instance_init = serial_mm_instance_init, + .instance_size = sizeof(SerialMM), +}; + static void serial_register_types(void) { type_register_static(&serial_info); + type_register_static(&serial_mm_info); } type_init(serial_register_types) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index ca7d813..23fdd5e 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -50,7 +50,7 @@ typedef struct { MachineState *mach; MIPSCPSState cps; - SerialState *uart; + SerialMM *uart; CharBackend lcd_display; char lcd_content[8]; diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 783cd99..ea92e5e 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -83,7 +83,7 @@ typedef struct { uint32_t i2csel; CharBackend display; char display_text[9]; - SerialState *uart; + SerialMM *uart; bool display_inited; } MaltaFPGAState; -- cgit v1.1 From 17fd1a6490b1d66cdfa60c67060e63da71a43a51 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 20:14:02 +0200 Subject: serial-mm: add "regshift" property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit And a property and rename "it_shift" field to "regshift", as it seems to be more popular (and I don't know what "it" stands for). Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/serial.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index 8243908..f11f2cd 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1033,7 +1033,7 @@ static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size) { SerialMM *s = SERIAL_MM(opaque); - return serial_ioport_read(&s->serial, addr >> s->it_shift, 1); + return serial_ioport_read(&s->serial, addr >> s->regshift, 1); } static void serial_mm_write(void *opaque, hwaddr addr, @@ -1041,7 +1041,7 @@ static void serial_mm_write(void *opaque, hwaddr addr, { SerialMM *s = SERIAL_MM(opaque); value &= 255; - serial_ioport_write(&s->serial, addr >> s->it_shift, value, 1); + serial_ioport_write(&s->serial, addr >> s->regshift, value, 1); } static void serial_mm_realize(DeviceState *dev, Error **errp) @@ -1081,14 +1081,14 @@ static const MemoryRegionOps serial_mm_ops[3] = { }; SerialMM *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, + hwaddr base, int regshift, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); SerialState *s = &smm->serial; - smm->it_shift = it_shift; + qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift); s->irq = irq; qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); qdev_prop_set_chr(DEVICE(s), "chardev", chr); @@ -1097,7 +1097,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_init_nofail(DEVICE(smm)); memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], smm, - "serial", 8 << it_shift); + "serial", 8 << regshift); memory_region_add_subregion(address_space, base, &s->io); return smm; @@ -1111,10 +1111,21 @@ static void serial_mm_instance_init(Object *o) TYPE_SERIAL, &error_abort, NULL); } +static Property serial_mm_properties[] = { + /* + * Set the spacing between adjacent memory-mapped UART registers. + * Each register will be at (1 << regshift) bytes after the + * previous one. + */ + DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static void serial_mm_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + dc->props = serial_mm_properties; dc->realize = serial_mm_realize; } @@ -1124,6 +1135,7 @@ static const TypeInfo serial_mm_info = { .class_init = serial_mm_class_init, .instance_init = serial_mm_instance_init, .instance_size = sizeof(SerialMM), + .class_init = serial_mm_class_init, }; static void serial_register_types(void) -- cgit v1.1 From 80b2eed95dd6397541cc4d7ec36db0e182a8f402 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 18:07:03 +0200 Subject: serial-mm: add endianness property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a qdev property for endianness, so memory region setup can be done in realize. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index f11f2cd..1d350a8 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1093,6 +1093,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); qdev_prop_set_chr(DEVICE(s), "chardev", chr); qdev_set_legacy_instance_id(DEVICE(s), base, 2); + qdev_prop_set_uint8(DEVICE(self), "endianness", end); qdev_init_nofail(DEVICE(smm)); @@ -1118,6 +1119,7 @@ static Property serial_mm_properties[] = { * previous one. */ DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0), + DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN), DEFINE_PROP_END_OF_LIST(), }; -- cgit v1.1 From 9bc7176c8c30760d2dc0e5b560a6c14f5f9aa08d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 12:28:15 +0400 Subject: serial-mm: use sysbus facilities MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make SerialMM a regular sysbus device, by registering the irq, and the mmio region. Reexport the internal serial properties. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/serial.c | 50 ++++++++++++++++++++++++++++---------------------- 1 file changed, 28 insertions(+), 22 deletions(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index 1d350a8..b3927c7 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1044,18 +1044,6 @@ static void serial_mm_write(void *opaque, hwaddr addr, serial_ioport_write(&s->serial, addr >> s->regshift, value, 1); } -static void serial_mm_realize(DeviceState *dev, Error **errp) -{ - SerialMM *s = SERIAL_MM(dev); - Error *local_err = NULL; - - object_property_set_bool(OBJECT(&s->serial), true, "realized", &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } -} - static const MemoryRegionOps serial_mm_ops[3] = { [DEVICE_NATIVE_ENDIAN] = { .read = serial_mm_read, @@ -1080,26 +1068,42 @@ static const MemoryRegionOps serial_mm_ops[3] = { }, }; +static void serial_mm_realize(DeviceState *dev, Error **errp) +{ + SerialMM *smm = SERIAL_MM(dev); + SerialState *s = &smm->serial; + Error *local_err = NULL; + + object_property_set_bool(OBJECT(s), true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + memory_region_init_io(&s->io, NULL, &serial_mm_ops[smm->endianness], smm, + "serial", 8 << smm->regshift); + sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io); + sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq); +} + SerialMM *serial_mm_init(MemoryRegion *address_space, hwaddr base, int regshift, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); - SerialState *s = &smm->serial; + MemoryRegion *mr; qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift); - s->irq = irq; - qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); - qdev_prop_set_chr(DEVICE(s), "chardev", chr); - qdev_set_legacy_instance_id(DEVICE(s), base, 2); - qdev_prop_set_uint8(DEVICE(self), "endianness", end); - + qdev_prop_set_uint32(DEVICE(smm), "baudbase", baudbase); + qdev_prop_set_chr(DEVICE(smm), "chardev", chr); + qdev_set_legacy_instance_id(DEVICE(smm), base, 2); + qdev_prop_set_uint8(DEVICE(smm), "endianness", end); qdev_init_nofail(DEVICE(smm)); - memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], smm, - "serial", 8 << regshift); - memory_region_add_subregion(address_space, base, &s->io); + sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq); + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0); + memory_region_add_subregion(address_space, base, mr); return smm; } @@ -1110,6 +1114,8 @@ static void serial_mm_instance_init(Object *o) object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), TYPE_SERIAL, &error_abort, NULL); + + qdev_alias_all_properties(DEVICE(&smm->serial), o); } static Property serial_mm_properties[] = { -- cgit v1.1 From 10315a70896fb82000cc4b2a1198b70c775c7a59 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 18:37:33 +0200 Subject: serial: make SerialIO a sysbus device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make serial IO a proper sysbus device, similar to serial MM. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 53 insertions(+), 11 deletions(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index b3927c7..3bcb7a6 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -985,22 +985,63 @@ const MemoryRegionOps serial_io_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -SerialState *serial_init(int base, qemu_irq irq, int baudbase, - Chardev *chr, MemoryRegion *system_io) +static void serial_io_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); - SerialState *s = SERIAL(dev); + SerialIO *sio = SERIAL_IO(dev); + SerialState *s = &sio->serial; + Error *local_err = NULL; - s->irq = irq; - qdev_prop_set_uint32(dev, "baudbase", baudbase); - qdev_prop_set_chr(dev, "chardev", chr); - qdev_set_legacy_instance_id(dev, base, 2); - qdev_init_nofail(dev); + object_property_set_bool(OBJECT(s), true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); - memory_region_add_subregion(system_io, base, &s->io); + sysbus_init_irq(SYS_BUS_DEVICE(sio), &s->irq); +} + +static void serial_io_class_init(ObjectClass *klass, void* data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = serial_io_realize; + /* No dc->vmsd: class has no migratable state */ +} + +static void serial_io_instance_init(Object *o) +{ + SerialIO *sio = SERIAL_IO(o); + + object_initialize_child(o, "serial", &sio->serial, sizeof(sio->serial), + TYPE_SERIAL, &error_abort, NULL); + + qdev_alias_all_properties(DEVICE(&sio->serial), o); +} + + +static const TypeInfo serial_io_info = { + .name = TYPE_SERIAL_IO, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(SerialIO), + .instance_init = serial_io_instance_init, + .class_init = serial_io_class_init, +}; + +SerialIO *serial_init(int base, qemu_irq irq, int baudbase, + Chardev *chr, MemoryRegion *system_io) +{ + SerialIO *sio = SERIAL_IO(qdev_create(NULL, TYPE_SERIAL_IO)); + + qdev_prop_set_uint32(DEVICE(sio), "baudbase", baudbase); + qdev_prop_set_chr(DEVICE(sio), "chardev", chr); + qdev_set_legacy_instance_id(DEVICE(sio), base, 2); + qdev_init_nofail(DEVICE(sio)); + + sysbus_connect_irq(SYS_BUS_DEVICE(sio), 0, irq); + memory_region_add_subregion(system_io, base, &sio->serial.io); - return s; + return sio; } static Property serial_properties[] = { @@ -1149,6 +1190,7 @@ static const TypeInfo serial_mm_info = { static void serial_register_types(void) { type_register_static(&serial_info); + type_register_static(&serial_io_info); type_register_static(&serial_mm_info); } -- cgit v1.1 From 9fac5d88ee1a81dca643a62bfce5a2364b437bfa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 15:29:55 +0200 Subject: mips: inline serial_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The function is specific to mipssim, let's inline it. (when inlining, we use a DeviceState variable instead of SerialIO, as it is the most common type used, and avoids having too many casts) Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic --- hw/char/serial.c | 16 ---------------- hw/mips/mips_mipssim.c | 15 ++++++++++++--- 2 files changed, 12 insertions(+), 19 deletions(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index 3bcb7a6..7746dfc 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1028,22 +1028,6 @@ static const TypeInfo serial_io_info = { .class_init = serial_io_class_init, }; -SerialIO *serial_init(int base, qemu_irq irq, int baudbase, - Chardev *chr, MemoryRegion *system_io) -{ - SerialIO *sio = SERIAL_IO(qdev_create(NULL, TYPE_SERIAL_IO)); - - qdev_prop_set_uint32(DEVICE(sio), "baudbase", baudbase); - qdev_prop_set_chr(DEVICE(sio), "chardev", chr); - qdev_set_legacy_instance_id(DEVICE(sio), base, 2); - qdev_init_nofail(DEVICE(sio)); - - sysbus_connect_irq(SYS_BUS_DEVICE(sio), 0, irq); - memory_region_add_subregion(system_io, base, &sio->serial.io); - - return sio; -} - static Property serial_properties[] = { DEFINE_PROP_CHR("chardev", SerialState, chr), DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200), diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 282bbec..5ee2610 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -40,6 +40,7 @@ #include "hw/loader.h" #include "elf.h" #include "hw/sysbus.h" +#include "hw/qdev-properties.h" #include "exec/address-spaces.h" #include "qemu/error-report.h" #include "sysemu/qtest.h" @@ -219,9 +220,17 @@ mips_mipssim_init(MachineState *machine) * A single 16450 sits at offset 0x3f8. It is attached to * MIPS CPU INT2, which is interrupt 4. */ - if (serial_hd(0)) - serial_init(0x3f8, env->irq[4], 115200, serial_hd(0), - get_system_io()); + if (serial_hd(0)) { + DeviceState *dev = qdev_create(NULL, TYPE_SERIAL_IO); + + qdev_prop_set_uint32(dev, "baudbase", 115200); + qdev_prop_set_chr(dev, "chardev", serial_hd(0)); + qdev_set_legacy_instance_id(dev, 0x3f8, 2); + qdev_init_nofail(dev); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); + memory_region_add_subregion(get_system_io(), 0x3f8, + &SERIAL_IO(dev)->serial.io); + } if (nd_table[0].used) /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ -- cgit v1.1 From f90f2cf7ae77bd85a8439b0abcc05d88c8cc0cb7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 15:20:22 +0400 Subject: mips: baudbase is 115200 by default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit (The default value is set for TYPE_SERIAL in serial_properties) Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic --- hw/mips/mips_mipssim.c | 1 - 1 file changed, 1 deletion(-) (limited to 'hw') diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 5ee2610..3cd0e6e 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -223,7 +223,6 @@ mips_mipssim_init(MachineState *machine) if (serial_hd(0)) { DeviceState *dev = qdev_create(NULL, TYPE_SERIAL_IO); - qdev_prop_set_uint32(dev, "baudbase", 115200); qdev_prop_set_chr(dev, "chardev", serial_hd(0)); qdev_set_legacy_instance_id(dev, 0x3f8, 2); qdev_init_nofail(dev); -- cgit v1.1 From 4f1733d4c0cdc01f6425683df7dffbc69351a323 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 13:41:10 +0400 Subject: mips: use sysbus_add_io() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit sysbus devices should use the associated helper function instead of calling memory_region_add_subregion() manually. This simplifies slightly the code. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé --- hw/mips/mips_mipssim.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'hw') diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 3cd0e6e..2c2c7f2 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -227,8 +227,7 @@ mips_mipssim_init(MachineState *machine) qdev_set_legacy_instance_id(dev, 0x3f8, 2); qdev_init_nofail(dev); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); - memory_region_add_subregion(get_system_io(), 0x3f8, - &SERIAL_IO(dev)->serial.io); + sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, &SERIAL_IO(dev)->serial.io); } if (nd_table[0].used) -- cgit v1.1 From d9259178fe51a0a550fe50561eb0c346ad4518a4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 15:16:29 +0400 Subject: mips: use sysbus_mmio_get_region() instead of internal fields MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Register the memory region with sysbus_init_mmio() and look it up with sysbus_mmio_get_region() to avoid accessing internal device fields. Suggested-by: Peter Maydell Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial.c | 1 + hw/mips/mips_mipssim.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/char/serial.c b/hw/char/serial.c index 7746dfc..6c32718 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -998,6 +998,7 @@ static void serial_io_realize(DeviceState *dev, Error **errp) } memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); + sysbus_init_mmio(SYS_BUS_DEVICE(sio), &s->io); sysbus_init_irq(SYS_BUS_DEVICE(sio), &s->irq); } diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 2c2c7f2..84c03dd 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -227,7 +227,8 @@ mips_mipssim_init(MachineState *machine) qdev_set_legacy_instance_id(dev, 0x3f8, 2); qdev_init_nofail(dev); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); - sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, &SERIAL_IO(dev)->serial.io); + sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); } if (nd_table[0].used) -- cgit v1.1 From 0ed40f16a17eaa3a53d62cc871779fa9d5b4447d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 16:06:23 +0200 Subject: sm501: make SerialMM a child, export chardev property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Embed the SerialMM sybus device, and re-export its "chardev" property. That way, we can get rid of PROP_PTR "chr-state" and better track devices relationship. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/display/sm501.c | 29 +++++++++++++++++++++-------- hw/sh4/r2d.c | 2 +- 2 files changed, 22 insertions(+), 9 deletions(-) (limited to 'hw') diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 79bd7bc..66a1bfb 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1930,7 +1930,7 @@ typedef struct { SM501State state; uint32_t vram_size; uint32_t base; - void *chr_state; + SerialMM serial; } SM501SysBusState; static void sm501_realize_sysbus(DeviceState *dev, Error **errp) @@ -1938,6 +1938,7 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) SM501SysBusState *s = SYSBUS_SM501(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); DeviceState *usb_dev; + MemoryRegion *mr; sm501_init(&s->state, dev, s->vram_size); if (get_local_mem_size(&s->state) != s->vram_size) { @@ -1958,15 +1959,15 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); /* bridge to serial emulation module */ - serial_mm_init(&s->state.mmio_region, SM501_UART0, 2, - NULL, /* TODO : chain irq to IRL */ - 115200, s->chr_state, DEVICE_LITTLE_ENDIAN); + qdev_init_nofail(DEVICE(&s->serial)); + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->serial), 0); + memory_region_add_subregion(&s->state.mmio_region, SM501_UART0, mr); + /* TODO : chain irq to IRL */ } static Property sm501_sysbus_properties[] = { DEFINE_PROP_UINT32("vram-size", SM501SysBusState, vram_size, 0), DEFINE_PROP_UINT32("base", SM501SysBusState, base, 0), - DEFINE_PROP_PTR("chr-state", SM501SysBusState, chr_state), DEFINE_PROP_END_OF_LIST(), }; @@ -1997,9 +1998,20 @@ static void sm501_sysbus_class_init(ObjectClass *klass, void *data) dc->props = sm501_sysbus_properties; dc->reset = sm501_reset_sysbus; dc->vmsd = &vmstate_sm501_sysbus; - /* Note: pointer property "chr-state" may remain null, thus - * no need for dc->user_creatable = false; - */ +} + +static void sm501_sysbus_init(Object *o) +{ + SM501SysBusState *sm501 = SYSBUS_SM501(o); + SerialMM *smm = &sm501->serial; + + sysbus_init_child_obj(o, "serial", smm, sizeof(SerialMM), TYPE_SERIAL_MM); + qdev_set_legacy_instance_id(DEVICE(smm), SM501_UART0, 2); + qdev_prop_set_uint8(DEVICE(smm), "regshift", 2); + qdev_prop_set_uint8(DEVICE(smm), "endianness", DEVICE_LITTLE_ENDIAN); + + object_property_add_alias(o, "chardev", + OBJECT(smm), "chardev", &error_abort); } static const TypeInfo sm501_sysbus_info = { @@ -2007,6 +2019,7 @@ static const TypeInfo sm501_sysbus_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(SM501SysBusState), .class_init = sm501_sysbus_class_init, + .instance_init = sm501_sysbus_init, }; #define TYPE_PCI_SM501 "sm501" diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index ee0840f..72bb528 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -272,7 +272,7 @@ static void r2d_init(MachineState *machine) busdev = SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "vram-size", SM501_VRAM_SIZE); qdev_prop_set_uint32(dev, "base", 0x10000000); - qdev_prop_set_ptr(dev, "chr-state", serial_hd(2)); + qdev_prop_set_chr(dev, "chardev", serial_hd(2)); qdev_init_nofail(dev); sysbus_mmio_map(busdev, 0, 0x10000000); sysbus_mmio_map(busdev, 1, 0x13e00000); -- cgit v1.1 From 0fe4bb3241110fc9fbd1c5c457d58191fcdca5d3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 17:06:05 +0200 Subject: vmmouse: replace PROP_PTR with PROP_LINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While at it, use the expected type. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 6 +++--- hw/i386/vmmouse.c | 8 +++----- hw/input/pckbd.c | 8 +++----- 3 files changed, 9 insertions(+), 13 deletions(-) (limited to 'hw') diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a4fda69..8054bc4 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1156,9 +1156,9 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport) vmmouse = NULL; } if (vmmouse) { - DeviceState *dev = DEVICE(vmmouse); - qdev_prop_set_ptr(dev, "ps2_mouse", i8042); - qdev_init_nofail(dev); + object_property_set_link(OBJECT(vmmouse), OBJECT(i8042), + "i8042", &error_abort); + qdev_init_nofail(DEVICE(vmmouse)); } port92 = isa_create_simple(isa_bus, TYPE_PORT92); diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c index 41ad91a..c0c329f 100644 --- a/hw/i386/vmmouse.c +++ b/hw/i386/vmmouse.c @@ -66,7 +66,7 @@ typedef struct VMMouseState uint16_t status; uint8_t absolute; QEMUPutMouseEntry *entry; - void *ps2_mouse; + ISAKBDState *i8042; } VMMouseState; static uint32_t vmmouse_get_status(VMMouseState *s) @@ -105,7 +105,7 @@ static void vmmouse_mouse_event(void *opaque, int x, int y, int dz, int buttons_ /* need to still generate PS2 events to notify driver to read from queue */ - i8042_isa_mouse_fake_event(s->ps2_mouse); + i8042_isa_mouse_fake_event(s->i8042); } static void vmmouse_remove_handler(VMMouseState *s) @@ -275,7 +275,7 @@ static void vmmouse_realizefn(DeviceState *dev, Error **errp) } static Property vmmouse_properties[] = { - DEFINE_PROP_PTR("ps2_mouse", VMMouseState, ps2_mouse), + DEFINE_PROP_LINK("i8042", VMMouseState, i8042, TYPE_I8042, ISAKBDState *), DEFINE_PROP_END_OF_LIST(), }; @@ -287,8 +287,6 @@ static void vmmouse_class_initfn(ObjectClass *klass, void *data) dc->reset = vmmouse_reset; dc->vmsd = &vmstate_vmmouse; dc->props = vmmouse_properties; - /* Reason: pointer property "ps2_mouse" */ - dc->user_creatable = false; } static const TypeInfo vmmouse_info = { diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 2f09f78..60a4130 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -482,17 +482,15 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) -typedef struct ISAKBDState { +struct ISAKBDState { ISADevice parent_obj; KBDState kbd; MemoryRegion io[2]; -} ISAKBDState; +}; -void i8042_isa_mouse_fake_event(void *opaque) +void i8042_isa_mouse_fake_event(ISAKBDState *isa) { - ISADevice *dev = opaque; - ISAKBDState *isa = I8042(dev); KBDState *s = &isa->kbd; ps2_mouse_fake_event(s->mouse); -- cgit v1.1 From 4cc76287d81036909e43e29a7a42e8d9852041db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 17:31:48 +0200 Subject: lance: replace PROP_PTR with PROP_LINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The device remains non-user creatable since it is a sysbus device. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/dma/sparc32_dma.c | 2 +- hw/net/lance.c | 5 ++--- hw/net/pcnet-pci.c | 2 +- hw/net/pcnet.h | 2 +- 4 files changed, 5 insertions(+), 6 deletions(-) (limited to 'hw') diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 0e5bbcd..3e4da0c 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -346,7 +346,7 @@ static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) d = qdev_create(NULL, TYPE_LANCE); object_property_add_child(OBJECT(dev), "lance", OBJECT(d), errp); qdev_set_nic_properties(d, nd); - qdev_prop_set_ptr(d, "dma", dev); + object_property_set_link(OBJECT(d), OBJECT(dev), "dma", errp); qdev_init_nofail(d); } diff --git a/hw/net/lance.c b/hw/net/lance.c index 6631e2a..4d96299 100644 --- a/hw/net/lance.c +++ b/hw/net/lance.c @@ -138,7 +138,8 @@ static void lance_instance_init(Object *obj) } static Property lance_properties[] = { - DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque), + DEFINE_PROP_LINK("dma", SysBusPCNetState, state.dma_opaque, + TYPE_DEVICE, DeviceState *), DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf), DEFINE_PROP_END_OF_LIST(), }; @@ -153,8 +154,6 @@ static void lance_class_init(ObjectClass *klass, void *data) dc->reset = lance_reset; dc->vmsd = &vmstate_lance; dc->props = lance_properties; - /* Reason: pointer property "dma" */ - dc->user_creatable = false; } static const TypeInfo lance_info = { diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 4723c30..d067d21 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -231,7 +231,7 @@ static void pci_pcnet_realize(PCIDevice *pci_dev, Error **errp) s->irq = pci_allocate_irq(pci_dev); s->phys_mem_read = pci_physical_memory_read; s->phys_mem_write = pci_physical_memory_write; - s->dma_opaque = pci_dev; + s->dma_opaque = DEVICE(pci_dev); pcnet_common_init(DEVICE(pci_dev), s, &net_pci_pcnet_info); } diff --git a/hw/net/pcnet.h b/hw/net/pcnet.h index 28d19a5..f49b213 100644 --- a/hw/net/pcnet.h +++ b/hw/net/pcnet.h @@ -50,7 +50,7 @@ struct PCNetState_st { uint8_t *buf, int len, int do_bswap); void (*phys_mem_write)(void *dma_opaque, hwaddr addr, uint8_t *buf, int len, int do_bswap); - void *dma_opaque; + DeviceState *dma_opaque; int tx_busy; int looptest; }; -- cgit v1.1 From 3af6eb8f9b489c72a1f540e752d8d5f1503b9a87 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 17:49:22 +0200 Subject: etraxfs: remove PROP_PTR usage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit etraxfs_dma_client are not Object, so can't be exposed to user with QOM path. Let's remove property usage and move the constructor to the .c unit, simplifying some code on the way. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/net/etraxfs_eth.c | 44 +++++++++++++++++++++++++++++++++----------- 1 file changed, 33 insertions(+), 11 deletions(-) (limited to 'hw') diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 4cfbf11..f30d963 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -338,14 +338,8 @@ typedef struct ETRAXFSEthState uint8_t macaddr[2][6]; uint32_t regs[FS_ETH_MAX_REGS]; - union { - void *vdma_out; - struct etraxfs_dma_client *dma_out; - }; - union { - void *vdma_in; - struct etraxfs_dma_client *dma_in; - }; + struct etraxfs_dma_client *dma_out; + struct etraxfs_dma_client *dma_in; /* MDIO bus. */ struct qemu_mdio mdio_bus; @@ -635,8 +629,6 @@ static void etraxfs_eth_realize(DeviceState *dev, Error **errp) static Property etraxfs_eth_properties[] = { DEFINE_PROP_UINT32("phyaddr", ETRAXFSEthState, phyaddr, 1), - DEFINE_PROP_PTR("dma_out", ETRAXFSEthState, vdma_out), - DEFINE_PROP_PTR("dma_in", ETRAXFSEthState, vdma_in), DEFINE_NIC_PROPERTIES(ETRAXFSEthState, conf), DEFINE_PROP_END_OF_LIST(), }; @@ -648,10 +640,40 @@ static void etraxfs_eth_class_init(ObjectClass *klass, void *data) dc->realize = etraxfs_eth_realize; dc->reset = etraxfs_eth_reset; dc->props = etraxfs_eth_properties; - /* Reason: pointer properties "dma_out", "dma_in" */ + /* Reason: dma_out, dma_in are not user settable */ dc->user_creatable = false; } + +/* Instantiate an ETRAXFS Ethernet MAC. */ +DeviceState * +etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, + struct etraxfs_dma_client *dma_out, + struct etraxfs_dma_client *dma_in) +{ + DeviceState *dev; + qemu_check_nic_model(nd, "fseth"); + + dev = qdev_create(NULL, "etraxfs-eth"); + qdev_set_nic_properties(dev, nd); + qdev_prop_set_uint32(dev, "phyaddr", phyaddr); + + /* + * TODO: QOM design, define a QOM interface for "I am an etraxfs + * DMA client" (which replaces the current 'struct + * etraxfs_dma_client' ad-hoc interface), implement it on the + * ethernet device, and then have QOM link properties on the DMA + * controller device so that you can pass the interface + * implementations to it. + */ + ETRAX_FS_ETH(dev)->dma_out = dma_out; + ETRAX_FS_ETH(dev)->dma_in = dma_in; + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + + return dev; +} + static const TypeInfo etraxfs_eth_info = { .name = TYPE_ETRAX_FS_ETH, .parent = TYPE_SYS_BUS_DEVICE, -- cgit v1.1 From 3110ce819278f1b6d2c4fdd3e15e773e8f226316 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 18:03:43 +0200 Subject: dp8393x: replace PROP_PTR with PROP_LINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Link property is the correct way to pass a MemoryRegion to a device for DMA purposes. Sidenote: as a sysbus device, this remains non-usercreatable even though we can drop the specific flag here. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier --- hw/m68k/q800.c | 3 ++- hw/mips/mips_jazz.c | 3 ++- hw/net/dp8393x.c | 7 +++---- 3 files changed, 7 insertions(+), 6 deletions(-) (limited to 'hw') diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 4ca8678..8f3eb6b 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -239,7 +239,8 @@ static void q800_init(MachineState *machine) qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint8(dev, "it_shift", 2); qdev_prop_set_bit(dev, "big_endian", true); - qdev_prop_set_ptr(dev, "dma_mr", get_system_memory()); + object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()), + "dma_mr", &error_abort); qdev_init_nofail(dev); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, SONIC_BASE); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 291fd6c..66fd4d8 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -290,7 +290,8 @@ static void mips_jazz_init(MachineState *machine, dev = qdev_create(NULL, "dp8393x"); qdev_set_nic_properties(dev, nd); qdev_prop_set_uint8(dev, "it_shift", 2); - qdev_prop_set_ptr(dev, "dma_mr", rc4030_dma_mr); + object_property_set_link(OBJECT(dev), OBJECT(rc4030_dma_mr), + "dma_mr", &error_abort); qdev_init_nofail(dev); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x80001000); diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 3d991af..cdc2631 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -175,7 +175,7 @@ typedef struct dp8393xState { int loopback_packet; /* Memory access */ - void *dma_mr; + MemoryRegion *dma_mr; AddressSpace as; } dp8393xState; @@ -948,7 +948,8 @@ static const VMStateDescription vmstate_dp8393x = { static Property dp8393x_properties[] = { DEFINE_NIC_PROPERTIES(dp8393xState, conf), - DEFINE_PROP_PTR("dma_mr", dp8393xState, dma_mr), + DEFINE_PROP_LINK("dma_mr", dp8393xState, dma_mr, + TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0), DEFINE_PROP_BOOL("big_endian", dp8393xState, big_endian, false), DEFINE_PROP_END_OF_LIST(), @@ -963,8 +964,6 @@ static void dp8393x_class_init(ObjectClass *klass, void *data) dc->reset = dp8393x_reset; dc->vmsd = &vmstate_dp8393x; dc->props = dp8393x_properties; - /* Reason: dma_mr property can't be set */ - dc->user_creatable = false; } static const TypeInfo dp8393x_info = { -- cgit v1.1 From ab4c072d2f2f4d2e4bfa54bb89e43e2b4cb86275 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 18:42:35 +0200 Subject: leon3: use qemu_irq framework instead of callback as property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "set_pin_in" property is used to define a callback mechanism where the device says "call the callback function, passing it an opaque cookie and a 32-bit value". We already have a generic mechanism for doing that, which is the qemu_irq. So we should just use that. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: KONRAD Frederic --- hw/intc/grlib_irqmp.c | 35 ++++------------------------------- hw/sparc/leon3.c | 13 +++++++++---- 2 files changed, 13 insertions(+), 35 deletions(-) (limited to 'hw') diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index bc78e1a..794c643 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -25,6 +25,7 @@ */ #include "qemu/osdep.h" +#include "hw/irq.h" #include "hw/sysbus.h" #include "cpu.h" @@ -58,10 +59,8 @@ typedef struct IRQMP { MemoryRegion iomem; - void *set_pil_in; - void *set_pil_in_opaque; - IRQMPState *state; + qemu_irq irq; } IRQMP; struct IRQMPState { @@ -82,7 +81,6 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) uint32_t pend = 0; uint32_t level0 = 0; uint32_t level1 = 0; - set_pil_in_fn set_pil_in; assert(state != NULL); assert(state->parent != NULL); @@ -97,14 +95,8 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) trace_grlib_irqmp_check_irqs(state->pending, state->force[0], state->mask[0], level1, level0); - set_pil_in = (set_pil_in_fn)state->parent->set_pil_in; - /* Trigger level1 interrupt first and level0 if there is no level1 */ - if (level1 != 0) { - set_pil_in(state->parent->set_pil_in_opaque, level1); - } else { - set_pil_in(state->parent->set_pil_in_opaque, level0); - } + qemu_set_irq(state->parent->irq, level1 ?: level0); } static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask) @@ -335,6 +327,7 @@ static void grlib_irqmp_init(Object *obj) IRQMP *irqmp = GRLIB_IRQMP(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); + qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1); memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); @@ -343,31 +336,11 @@ static void grlib_irqmp_init(Object *obj) sysbus_init_mmio(dev, &irqmp->iomem); } -static void grlib_irqmp_realize(DeviceState *dev, Error **errp) -{ - IRQMP *irqmp = GRLIB_IRQMP(dev); - - /* Check parameters */ - if (irqmp->set_pil_in == NULL) { - error_setg(errp, "set_pil_in cannot be NULL."); - } -} - -static Property grlib_irqmp_properties[] = { - DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in), - DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque), - DEFINE_PROP_END_OF_LIST(), -}; - static void grlib_irqmp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = grlib_irqmp_reset; - dc->props = grlib_irqmp_properties; - /* Reason: pointer properties "set_pil_in", "set_pil_in_opaque" */ - dc->user_creatable = false; - dc->realize = grlib_irqmp_realize; } static const TypeInfo grlib_irqmp_info = { diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index c5f1b1e..cac9873 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -143,9 +143,14 @@ void leon3_irq_ack(void *irq_manager, int intno) grlib_irqmp_ack((DeviceState *)irq_manager, intno); } -static void leon3_set_pil_in(void *opaque, uint32_t pil_in) +/* + * This device assumes that the incoming 'level' value on the + * qemu_irq is the interrupt number, not just a simple 0/1 level. + */ +static void leon3_set_pil_in(void *opaque, int n, int level) { - CPUSPARCState *env = (CPUSPARCState *)opaque; + CPUSPARCState *env = opaque; + uint32_t pil_in = level; CPUState *cs; assert(env != NULL); @@ -225,8 +230,8 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); - qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); - qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); + env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; -- cgit v1.1 From e23ae617f68420248a978c1040686658a34a7f95 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 17:38:51 +0400 Subject: leon3: use qdev gpio facilities for the PIL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As Peter Maydell once said: "Creating a gpio pin on some object that isn't yourself looks a bit odd, but all this leon3 code is modifying the CPU object from the outside anyway. Someday we might tidy it up, but not today." Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'hw') diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index cac9873..8038887 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -230,8 +230,10 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); - env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); - qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, + env, "pil", 1); + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, + qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; -- cgit v1.1 From 3a87dde8a05978401fb846b6513503b9fd4186d9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 17:42:01 +0400 Subject: qdev: use g_strcmp0() instead of open-coding it MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Minor code simplification. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/core/qdev.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 501228b..aa3ccbf 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -394,11 +394,8 @@ static NamedGPIOList *qdev_get_named_gpio_list(DeviceState *dev, NamedGPIOList *ngl; QLIST_FOREACH(ngl, &dev->gpios, node) { - /* NULL is a valid and matchable name, otherwise do a normal - * strcmp match. - */ - if ((!ngl->name && !name) || - (name && ngl->name && strcmp(name, ngl->name) == 0)) { + /* NULL is a valid and matchable name. */ + if (g_strcmp0(name, ngl->name) == 0) { return ngl; } } -- cgit v1.1 From 3cff81733da62eaea2252e638ea47849cf284ceb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 19:04:11 +0200 Subject: mips/cps: fix setting saar property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is no "saar" property. Note: I haven't been able to test this code. Help welcome. May fix commit 043715d1e0fbb3e3411be3f898c5b77b7f90327a ("target/mips: Update ITU to utilize SAARI and SAAR CP0 registers") Signed-off-by: Marc-André Lureau Reviewed-by: Aleksandar Markovic --- hw/mips/cps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw') diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 1660f86..c49868d 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -106,7 +106,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->itu), saar_present, "saar-present", &err); if (saar_present) { - qdev_prop_set_ptr(DEVICE(&s->itu), "saar", (void *)&env->CP0_SAAR); + s->itu.saar = &env->CP0_SAAR; } object_property_set_bool(OBJECT(&s->itu), true, "realized", &err); if (err != NULL) { -- cgit v1.1 From f4f643882d9dc4676411d1f5fcf9393aa745570b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 19:16:53 +0200 Subject: cris: improve passing PIC interrupt vector to the CPU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of accessing cpu interrupt vector directly from PIC, send the vector value over the qemu_irq. Suggested-by: Peter Maydell Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/cris/axis_dev88.c | 4 ---- hw/intc/etraxfs_pic.c | 26 +------------------------- 2 files changed, 1 insertion(+), 29 deletions(-) (limited to 'hw') diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 940c7dd..be77604 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -253,7 +253,6 @@ void axisdev88_init(MachineState *machine) const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; CRISCPU *cpu; - CPUCRISState *env; DeviceState *dev; SysBusDevice *s; DriveInfo *nand; @@ -267,7 +266,6 @@ void axisdev88_init(MachineState *machine) /* init CPUs */ cpu = CRIS_CPU(cpu_create(machine->cpu_type)); - env = &cpu->env; /* allocate RAM */ memory_region_allocate_system_memory(phys_ram, NULL, "axisdev88.ram", @@ -297,8 +295,6 @@ void axisdev88_init(MachineState *machine) dev = qdev_create(NULL, "etraxfs,pic"); - /* FIXME: Is there a proper way to signal vectors to the CPU core? */ - qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0x3001c000); diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c index 77f652a..12988c7 100644 --- a/hw/intc/etraxfs_pic.c +++ b/hw/intc/etraxfs_pic.c @@ -27,8 +27,6 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" -//#include "pc.h" -//#include "etraxfs.h" #define D(x) @@ -48,7 +46,6 @@ struct etrax_pic SysBusDevice parent_obj; MemoryRegion mmio; - void *interrupt_vector; qemu_irq parent_irq; qemu_irq parent_nmi; uint32_t regs[R_MAX]; @@ -79,11 +76,7 @@ static void pic_update(struct etrax_pic *fs) } } - if (fs->interrupt_vector) { - /* hack alert: ptr property */ - *(uint32_t*)(fs->interrupt_vector) = vector; - } - qemu_set_irq(fs->parent_irq, !!vector); + qemu_set_irq(fs->parent_irq, vector); } static uint64_t @@ -163,28 +156,11 @@ static void etraxfs_pic_init(Object *obj) sysbus_init_mmio(sbd, &s->mmio); } -static Property etraxfs_pic_properties[] = { - DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector), - DEFINE_PROP_END_OF_LIST(), -}; - -static void etraxfs_pic_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - - dc->props = etraxfs_pic_properties; - /* - * Note: pointer property "interrupt_vector" may remain null, thus - * no need for dc->user_creatable = false; - */ -} - static const TypeInfo etraxfs_pic_info = { .name = TYPE_ETRAX_FS_PIC, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(struct etrax_pic), .instance_init = etraxfs_pic_init, - .class_init = etraxfs_pic_class_init, }; static void etraxfs_pic_register_types(void) -- cgit v1.1 From b9751d205febdfefdb9bb9828fef07ae9a966f1b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 12:19:36 +0200 Subject: smbus-eeprom: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead, set the initial data field directly. (the initial data is an array of 256 bytes. As I don't know if it may change over time, I keep the pointer to original buffer as is, but it might be worth to consider to copy it instead) Signed-off-by: Marc-André Lureau Reviewed-by: Corey Minyard --- hw/i2c/smbus_eeprom.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'hw') diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index 54c86a0..5adf3b1 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -44,7 +44,7 @@ typedef struct SMBusEEPROMDevice { SMBusDevice smbusdev; uint8_t data[SMBUS_EEPROM_SIZE]; - void *init_data; + uint8_t *init_data; uint8_t offset; bool accessed; } SMBusEEPROMDevice; @@ -129,14 +129,14 @@ static void smbus_eeprom_reset(DeviceState *dev) static void smbus_eeprom_realize(DeviceState *dev, Error **errp) { + SMBusEEPROMDevice *eeprom = SMBUS_EEPROM(dev); + smbus_eeprom_reset(dev); + if (eeprom->init_data == NULL) { + error_setg(errp, "init_data cannot be NULL"); + } } -static Property smbus_eeprom_properties[] = { - DEFINE_PROP_PTR("data", SMBusEEPROMDevice, init_data), - DEFINE_PROP_END_OF_LIST(), -}; - static void smbus_eeprom_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -146,9 +146,8 @@ static void smbus_eeprom_class_initfn(ObjectClass *klass, void *data) dc->reset = smbus_eeprom_reset; sc->receive_byte = eeprom_receive_byte; sc->write_data = eeprom_write_data; - dc->props = smbus_eeprom_properties; dc->vmsd = &vmstate_smbus_eeprom; - /* Reason: pointer property "data" */ + /* Reason: init_data */ dc->user_creatable = false; } @@ -172,7 +171,8 @@ void smbus_eeprom_init_one(I2CBus *smbus, uint8_t address, uint8_t *eeprom_buf) dev = qdev_create((BusState *) smbus, TYPE_SMBUS_EEPROM); qdev_prop_set_uint8(dev, "address", address); - qdev_prop_set_ptr(dev, "data", eeprom_buf); + /* FIXME: use an array of byte or block backend property? */ + SMBUS_EEPROM(dev)->init_data = eeprom_buf; qdev_init_nofail(dev); } -- cgit v1.1 From bab592a259a6603922a4f54caedb6e52da692e35 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 14:42:57 +0200 Subject: omap-intc: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. (in theory there should probably be different methods for omap1 & omap2 intc, but this is left as a future improvement) Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/omap1.c | 4 ++-- hw/arm/omap2.c | 4 ++-- hw/intc/omap_intc.c | 17 ++++++++++------- 3 files changed, 14 insertions(+), 11 deletions(-) (limited to 'hw') diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 6ce038a..1afd1d3 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3889,7 +3889,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->ih[0] = qdev_create(NULL, "omap-intc"); qdev_prop_set_uint32(s->ih[0], "size", 0x100); - qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck")); + omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "arminth_ck")); qdev_init_nofail(s->ih[0]); busdev = SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, @@ -3899,7 +3899,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, sysbus_mmio_map(busdev, 0, 0xfffecb00); s->ih[1] = qdev_create(NULL, "omap-intc"); qdev_prop_set_uint32(s->ih[1], "size", 0x800); - qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck")); + omap_intc_set_iclk(OMAP_INTC(s->ih[1]), omap_findclk(s, "arminth_ck")); qdev_init_nofail(s->ih[1]); busdev = SYS_BUS_DEVICE(s->ih[1]); sysbus_connect_irq(busdev, 0, diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 457f152..1d7cc43 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2308,8 +2308,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */ s->ih[0] = qdev_create(NULL, "omap2-intc"); qdev_prop_set_uint8(s->ih[0], "revision", 0x21); - qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk")); - qdev_prop_set_ptr(s->ih[0], "iclk", omap_findclk(s, "mpu_intc_iclk")); + omap_intc_set_fclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_fclk")); + omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_iclk")); qdev_init_nofail(s->ih[0]); busdev = SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index 854b709..73bb1c2 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -38,10 +38,6 @@ struct omap_intr_handler_bank_s { unsigned char priority[32]; }; -#define TYPE_OMAP_INTC "common-omap-intc" -#define OMAP_INTC(obj) \ - OBJECT_CHECK(struct omap_intr_handler_s, (obj), TYPE_OMAP_INTC) - struct omap_intr_handler_s { SysBusDevice parent_obj; @@ -391,9 +387,18 @@ static void omap_intc_realize(DeviceState *dev, Error **errp) } } +void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk) +{ + intc->iclk = clk; +} + +void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk) +{ + intc->fclk = clk; +} + static Property omap_intc_properties[] = { DEFINE_PROP_UINT32("size", struct omap_intr_handler_s, size, 0x100), - DEFINE_PROP_PTR("clk", struct omap_intr_handler_s, iclk), DEFINE_PROP_END_OF_LIST(), }; @@ -647,8 +652,6 @@ static void omap2_intc_realize(DeviceState *dev, Error **errp) static Property omap2_intc_properties[] = { DEFINE_PROP_UINT8("revision", struct omap_intr_handler_s, revision, 0x21), - DEFINE_PROP_PTR("iclk", struct omap_intr_handler_s, iclk), - DEFINE_PROP_PTR("fclk", struct omap_intr_handler_s, fclk), DEFINE_PROP_END_OF_LIST(), }; -- cgit v1.1 From 0fd20c532faa6d5ebed8a43763f96a4829b33be2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 14:56:44 +0200 Subject: omap-i2c: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Corey Minyard Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/omap1.c | 2 +- hw/arm/omap2.c | 8 ++++---- hw/i2c/omap_i2c.c | 19 ++++++++++++------- 3 files changed, 17 insertions(+), 12 deletions(-) (limited to 'hw') diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 1afd1d3..807e5f7 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -4030,7 +4030,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->i2c[0] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x11); - qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "mpuper_ck")); + omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "mpuper_ck")); qdev_init_nofail(s->i2c[0]); busdev = SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C)); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 1d7cc43..171e2d0 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2425,8 +2425,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->i2c[0] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x34); - qdev_prop_set_ptr(s->i2c[0], "iclk", omap_findclk(s, "i2c1.iclk")); - qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "i2c1.fclk")); + omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk")); + omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk")); qdev_init_nofail(s->i2c[0]); busdev = SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, @@ -2437,8 +2437,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->i2c[1] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(s->i2c[1], "revision", 0x34); - qdev_prop_set_ptr(s->i2c[1], "iclk", omap_findclk(s, "i2c2.iclk")); - qdev_prop_set_ptr(s->i2c[1], "fclk", omap_findclk(s, "i2c2.fclk")); + omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk")); + omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk")); qdev_init_nofail(s->i2c[1]); busdev = SYS_BUS_DEVICE(s->i2c[1]); sysbus_connect_irq(busdev, 0, diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c index 3ba965a..3ccbd5c 100644 --- a/hw/i2c/omap_i2c.c +++ b/hw/i2c/omap_i2c.c @@ -28,10 +28,7 @@ #include "qemu/error-report.h" #include "qapi/error.h" -#define TYPE_OMAP_I2C "omap_i2c" -#define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C) - -typedef struct OMAPI2CState { +struct OMAPI2CState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -56,7 +53,7 @@ typedef struct OMAPI2CState { uint8_t divider; uint8_t times[2]; uint16_t test; -} OMAPI2CState; +}; #define OMAP2_INTR_REV 0x34 #define OMAP2_GC_REV 0x34 @@ -504,10 +501,18 @@ static void omap_i2c_realize(DeviceState *dev, Error **errp) } } +void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk) +{ + i2c->iclk = clk; +} + +void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk) +{ + i2c->fclk = clk; +} + static Property omap_i2c_properties[] = { DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0), - DEFINE_PROP_PTR("iclk", OMAPI2CState, iclk), - DEFINE_PROP_PTR("fclk", OMAPI2CState, fclk), DEFINE_PROP_END_OF_LIST(), }; -- cgit v1.1 From ba2aba8370e33a44ff5619844b90bb7119c5cebf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 15:26:19 +0200 Subject: omap-gpio: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Move/adapt the existing TODO comment about a clock framework. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/omap1.c | 2 +- hw/arm/omap2.c | 13 +++++++------ hw/gpio/omap_gpio.c | 42 +++++++++++++++--------------------------- 3 files changed, 23 insertions(+), 34 deletions(-) (limited to 'hw') diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 807e5f7..761cc17 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -4012,7 +4012,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->gpio = qdev_create(NULL, "omap-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); - qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck")); + omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck")); qdev_init_nofail(s->gpio); sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1)); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 171e2d0..e1c11de 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2449,13 +2449,14 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->gpio = qdev_create(NULL, "omap2-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); - qdev_prop_set_ptr(s->gpio, "iclk", omap_findclk(s, "gpio_iclk")); - qdev_prop_set_ptr(s->gpio, "fclk0", omap_findclk(s, "gpio1_dbclk")); - qdev_prop_set_ptr(s->gpio, "fclk1", omap_findclk(s, "gpio2_dbclk")); - qdev_prop_set_ptr(s->gpio, "fclk2", omap_findclk(s, "gpio3_dbclk")); - qdev_prop_set_ptr(s->gpio, "fclk3", omap_findclk(s, "gpio4_dbclk")); + omap2_gpio_set_iclk(OMAP2_GPIO(s->gpio), omap_findclk(s, "gpio_iclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 0, omap_findclk(s, "gpio1_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 1, omap_findclk(s, "gpio2_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 2, omap_findclk(s, "gpio3_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 3, omap_findclk(s, "gpio4_dbclk")); if (s->mpu_model == omap2430) { - qdev_prop_set_ptr(s->gpio, "fclk4", omap_findclk(s, "gpio5_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4, + omap_findclk(s, "gpio5_dbclk")); } qdev_init_nofail(s->gpio); busdev = SYS_BUS_DEVICE(s->gpio); diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c index 41e1aa7..85c1689 100644 --- a/hw/gpio/omap_gpio.c +++ b/hw/gpio/omap_gpio.c @@ -40,10 +40,6 @@ struct omap_gpio_s { uint16_t pins; }; -#define TYPE_OMAP1_GPIO "omap-gpio" -#define OMAP1_GPIO(obj) \ - OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) - struct omap_gpif_s { SysBusDevice parent_obj; @@ -212,10 +208,6 @@ struct omap2_gpio_s { uint8_t delay; }; -#define TYPE_OMAP2_GPIO "omap2-gpio" -#define OMAP2_GPIO(obj) \ - OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) - struct omap2_gpif_s { SysBusDevice parent_obj; @@ -747,21 +739,13 @@ static void omap2_gpio_realize(DeviceState *dev, Error **errp) } } -/* Using qdev pointer properties for the clocks is not ideal. - * qdev should support a generic means of defining a 'port' with - * an arbitrary interface for connecting two devices. Then we - * could reframe the omap clock API in terms of clock ports, - * and get some type safety. For now the best qdev provides is - * passing an arbitrary pointer. - * (It's not possible to pass in the string which is the clock - * name, because this device does not have the necessary information - * (ie the struct omap_mpu_state_s*) to do the clockname to pointer - * translation.) - */ +void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk) +{ + gpio->clk = clk; +} static Property omap_gpio_properties[] = { DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0), - DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk), DEFINE_PROP_END_OF_LIST(), }; @@ -784,15 +768,19 @@ static const TypeInfo omap_gpio_info = { .class_init = omap_gpio_class_init, }; +void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk) +{ + gpio->iclk = clk; +} + +void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk) +{ + assert(i <= 5); + gpio->fclk[i] = clk; +} + static Property omap2_gpio_properties[] = { DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0), - DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk), - DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]), - DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]), - DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]), - DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]), - DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]), - DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]), DEFINE_PROP_END_OF_LIST(), }; -- cgit v1.1 From 70f3d674bc2daac865fb75878030c063697fd16a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 15:50:10 +0200 Subject: qdev: remove QDEV_PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No longer used in the tree. The comment about user_creatable is still quite relevant, but there is already a similar comment in qdev-core.h. Reviewed-by: Peter Maydell Signed-off-by: Marc-André Lureau --- hw/core/qdev-properties.c | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index ac28890..6ca7697 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -501,13 +501,6 @@ const PropertyInfo qdev_prop_string = { .set = set_string, }; -/* --- pointer --- */ - -/* Not a proper property, just for dirty hacks. TODO Remove it! */ -const PropertyInfo qdev_prop_ptr = { - .name = "ptr", -}; - /* --- mac address --- */ /* @@ -1165,17 +1158,6 @@ void qdev_prop_set_enum(DeviceState *dev, const char *name, int value) name, &error_abort); } -void qdev_prop_set_ptr(DeviceState *dev, const char *name, void *value) -{ - Property *prop; - void **ptr; - - prop = qdev_prop_find(dev, name); - assert(prop && prop->info == &qdev_prop_ptr); - ptr = qdev_get_prop_ptr(dev, prop); - *ptr = value; -} - static GPtrArray *global_props(void) { static GPtrArray *gp; -- cgit v1.1 From f0d753b1c1e6c334cd089be97a0eb9f1bc415559 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Sat, 26 Oct 2019 22:55:46 +0200 Subject: qdev/qom: remove some TODO limitations now that PROP_PTR is gone MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marc-André Lureau Reviewed-by: Markus Armbruster --- hw/core/qdev.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'hw') diff --git a/hw/core/qdev.c b/hw/core/qdev.c index aa3ccbf..9f1753f 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -736,14 +736,6 @@ void qdev_property_add_static(DeviceState *dev, Property *prop, if (prop->info->create) { prop->info->create(obj, prop, &local_err); } else { - /* - * TODO qdev_prop_ptr does not have getters or setters. It must - * go now that it can be replaced with links. The test should be - * removed along with it: all static properties are read/write. - */ - if (!prop->info->get && !prop->info->set) { - return; - } object_property_add(obj, prop->name, prop->info->name, prop->info->get, prop->info->set, prop->info->release, -- cgit v1.1