From c0f809c46aa271f29a9e6268cdeda1f21301a8ef Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Sun, 9 Jan 2011 23:53:45 +0100 Subject: target-sh4: implement writes to mmaped ITLB Some Linux kernels seems to implement ITLB/UTLB flushing through by writing all TLB entries through the memory mapped interface instead of writing one to MMUCR.TI. Implement memory mapped ITLB write interface so that such kernels can boot. This fixes https://bugs.launchpad.net/bugs/700774 . Signed-off-by: Aurelien Jarno --- hw/sh7750.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'hw/sh7750.c') diff --git a/hw/sh7750.c b/hw/sh7750.c index 9e54ad1..36b702f 100644 --- a/hw/sh7750.c +++ b/hw/sh7750.c @@ -670,6 +670,8 @@ static void sh7750_mmct_writel(void *opaque, target_phys_addr_t addr, /* do nothing */ break; case MM_ITLB_ADDR: + cpu_sh4_write_mmaped_itlb_addr(s->cpu, addr, mem_value); + break; case MM_ITLB_DATA: /* XXXXX */ abort(); -- cgit v1.1