From 2571a6427c4ded57e44d4c6cf92376d869a75a5c Mon Sep 17 00:00:00 2001 From: Rob Bradford Date: Tue, 31 Oct 2023 15:37:15 +0000 Subject: target/riscv: Use existing PMU counter mask in FDT generation During the FDT generation use the existing mask containing the enabled counters rather then generating a new one. Using the existing mask will support the use of discontinuous counters. Signed-off-by: Rob Bradford Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Atish Patra Message-ID: <20231031154000.18134-4-rbradford@rivosinc.com> Signed-off-by: Alistair Francis --- hw/riscv/virt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/riscv') diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 1732c42..c7fc97e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -722,7 +722,7 @@ static void create_fdt_pmu(RISCVVirtState *s) pmu_name = g_strdup_printf("/pmu"); qemu_fdt_add_subnode(ms->fdt, pmu_name); qemu_fdt_setprop_string(ms->fdt, pmu_name, "compatible", "riscv,pmu"); - riscv_pmu_generate_fdt_node(ms->fdt, hart.cfg.pmu_num, pmu_name); + riscv_pmu_generate_fdt_node(ms->fdt, hart.pmu_avail_ctrs, pmu_name); g_free(pmu_name); } -- cgit v1.1