From a0c7a97ea720fad88b2130d9c8972fc9b7666974 Mon Sep 17 00:00:00 2001 From: Isaku Yamahata Date: Fri, 30 Oct 2009 21:21:25 +0900 Subject: pci: implement pci bridge filtering. This patch implements pci bridge filtering. TODO: currently almost all the map funcions assumes filtered_size == size and addr & ~(size - 1) == addr. However with bridge filtering, they aren't always true. Teach them such cases, such that filtered_size < size and addr & (size - 1) != 0. Signed-off-by: Isaku Yamahata Signed-off-by: Anthony Liguori --- hw/pci.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/pci.h') diff --git a/hw/pci.h b/hw/pci.h index 3f50294..9a56d0d 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -86,6 +86,7 @@ typedef struct PCIIORegion { pcibus_t addr; /* current PCI mapping address. -1 means not mapped */ #define PCI_BAR_UNMAPPED (~(pcibus_t)0) pcibus_t size; + pcibus_t filtered_size; uint8_t type; PCIMapIORegionFunc *map_func; } PCIIORegion; @@ -130,6 +131,7 @@ typedef struct PCIIORegion { #define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */ #define PCI_IO_BASE 0x1c /* I/O range behind the bridge */ #define PCI_IO_LIMIT 0x1d +#define PCI_IO_RANGE_TYPE_32 0x01 #define PCI_IO_RANGE_MASK (~0x0fUL) #define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */ #define PCI_MEMORY_BASE 0x20 /* Memory range behind */ @@ -139,6 +141,7 @@ typedef struct PCIIORegion { #define PCI_PREF_MEMORY_LIMIT 0x26 #define PCI_PREF_RANGE_MASK (~0x0fUL) #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ +#define PCI_PREF_LIMIT_UPPER32 0x2c #define PCI_SUBSYSTEM_VENDOR_ID 0x2c /* 16 bits */ #define PCI_SUBSYSTEM_ID 0x2e /* 16 bits */ #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ -- cgit v1.1