From 2cfc9f1a968f8f832c7bf23f2491b058bdde028b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Tue, 26 Jan 2021 18:10:53 +0100 Subject: ppc/pnv: Add trace events for PCI event notification MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On POWER9 systems, PHB controllers signal the XIVE interrupt controller of a source interrupt notification using a store on a MMIO region. Add traces for such events. Signed-off-by: Cédric Le Goater Message-Id: <20210126171059.307867-2-clg@kaod.org> Signed-off-by: David Gibson --- hw/pci-host/pnv_phb4.c | 3 +++ hw/pci-host/trace-events | 3 +++ 2 files changed, 6 insertions(+) (limited to 'hw/pci-host') diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 6328e98..54f57c6 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -22,6 +22,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "qom/object.h" +#include "trace.h" #define phb_error(phb, fmt, ...) \ qemu_log_mask(LOG_GUEST_ERROR, "phb4[%d:%d]: " fmt "\n", \ @@ -1257,6 +1258,8 @@ static void pnv_phb4_xive_notify(XiveNotifier *xf, uint32_t srcno) uint64_t data = XIVE_TRIGGER_PQ | offset | srcno; MemTxResult result; + trace_pnv_phb4_xive_notify(notif_port, data); + address_space_stq_be(&address_space_memory, notif_port, data, MEMTXATTRS_UNSPECIFIED, &result); if (result != MEMTX_OK) { diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index d19ca9a..7d8063a 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -20,3 +20,6 @@ unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx6 unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx64 unin_write(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 unin_read(uint64_t addr, uint64_t value) "addr=0x%" PRIx64 " val=0x%"PRIx64 + +# pnv_phb4.c +pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) "notif=@0x%"PRIx64" data=0x%"PRIx64 -- cgit v1.1