From f1c0cff8a28ac25f48ecaea672eb3d68250bb3c4 Mon Sep 17 00:00:00 2001 From: Michael Tokarev Date: Fri, 14 Jul 2023 14:27:04 +0300 Subject: hw/pci: spelling fixes Signed-off-by: Michael Tokarev Reviewed-by: Peter Maydell --- hw/pci-bridge/cxl_downstream.c | 2 +- hw/pci-bridge/pci_expander_bridge.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'hw/pci-bridge') diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c index 54f5073..5a2b749 100644 --- a/hw/pci-bridge/cxl_downstream.c +++ b/hw/pci-bridge/cxl_downstream.c @@ -42,7 +42,7 @@ static void latch_registers(CXLDownstreamPort *dsp) CXL2_DOWNSTREAM_PORT); } -/* TODO: Look at sharing this code acorss all CXL port types */ +/* TODO: Look at sharing this code across all CXL port types */ static void cxl_dsp_dvsec_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len) { diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index 613857b..535889f 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -263,7 +263,7 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) /* * First carry out normal swizzle to handle - * multple root ports on a pxb instance. + * multiple root ports on a pxb instance. */ pin = pci_swizzle_map_irq_fn(pci_dev, pin); -- cgit v1.1