From 52ea63dea465575ccd71d52c3461b1b7d9f50ce0 Mon Sep 17 00:00:00 2001 From: Cao jin Date: Fri, 10 Jun 2016 17:54:23 +0800 Subject: fix some coding style problems It has: 1. More newlines make the code block well separated. 2. Add more comments for msi_init. 3. Fix a indentation in vmxnet3.c. 4. ioh3420 & xio3130_downstream: put PCI Express capability init function together, make it more readable. cc: Michael S. Tsirkin cc: Markus Armbruster cc: Marcel Apfelbaum cc: Dmitry Fleytman cc: Jason Wang Reviewed-by: Markus Armbruster Reviewed-by: Marcel Apfelbaum Signed-off-by: Cao jin Reviewed-by: Markus Armbruster Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci-bridge/xio3130_upstream.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/pci-bridge/xio3130_upstream.c') diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstream.c index 164ef58..d976844 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -66,11 +66,13 @@ static int xio3130_upstream_initfn(PCIDevice *d) if (rc < 0) { goto err_bridge; } + rc = pci_bridge_ssvid_init(d, XIO3130_SSVID_OFFSET, XIO3130_SSVID_SVID, XIO3130_SSVID_SSID); if (rc < 0) { goto err_bridge; } + rc = pcie_cap_init(d, XIO3130_EXP_OFFSET, PCI_EXP_TYPE_UPSTREAM, p->port); if (rc < 0) { @@ -78,6 +80,7 @@ static int xio3130_upstream_initfn(PCIDevice *d) } pcie_cap_flr_init(d); pcie_cap_deverr_init(d); + rc = pcie_aer_init(d, XIO3130_AER_OFFSET, PCI_ERR_SIZEOF); if (rc < 0) { goto err; -- cgit v1.1