From 40cd718052b6c665c41852b95e723f03469f65be Mon Sep 17 00:00:00 2001 From: Yongbok Kim Date: Thu, 3 Jan 2019 16:50:54 +0100 Subject: target/mips: Update ITU to handle bus errors Update ITU to handle bus errors. Reviewed-by: Stefan Markovic Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- hw/misc/mips_itu.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'hw/misc') diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c index ee1addc..1257d8f 100644 --- a/hw/misc/mips_itu.c +++ b/hw/misc/mips_itu.c @@ -375,6 +375,12 @@ static void view_pv_try_write(ITCStorageCell *c) view_pv_common_write(c); } +static void raise_exception(int excp) +{ + current_cpu->exception_index = excp; + cpu_loop_exit(current_cpu); +} + static uint64_t itc_storage_read(void *opaque, hwaddr addr, unsigned size) { MIPSITUState *s = (MIPSITUState *)opaque; @@ -382,6 +388,14 @@ static uint64_t itc_storage_read(void *opaque, hwaddr addr, unsigned size) ITCView view = get_itc_view(addr); uint64_t ret = -1; + switch (size) { + case 1: + case 2: + s->icr0 |= 1 << ITC_ICR0_ERR_AXI; + raise_exception(EXCP_DBE); + return 0; + } + switch (view) { case ITCVIEW_BYPASS: ret = view_bypass_read(cell); @@ -420,6 +434,14 @@ static void itc_storage_write(void *opaque, hwaddr addr, uint64_t data, ITCStorageCell *cell = get_cell(s, addr); ITCView view = get_itc_view(addr); + switch (size) { + case 1: + case 2: + s->icr0 |= 1 << ITC_ICR0_ERR_AXI; + raise_exception(EXCP_DBE); + return; + } + switch (view) { case ITCVIEW_BYPASS: view_bypass_write(cell, data); -- cgit v1.1