From a937b302831f12094437cdbdfc859bff9f093525 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 28 Oct 2020 13:30:04 +0800 Subject: hw/misc: Add Microchip PolarFire SoC IOSCB module support This creates a model for PolarFire SoC IOSCB [1] module. It actually contains lots of sub-modules like various PLLs to control different peripherals. Only the mininum capabilities are emulated to make the HSS DDR memory initialization codes happy. Lots of sub-modules are created as an unimplemented devices. [1] PF_SoC_RegMap_V1_1/MPFS250T/mpfs250t_ioscb_memmap_dri.htm in https://www.microsemi.com/document-portal/doc_download/1244581-polarfire-soc-register-map Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 1603863010-15807-5-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis --- hw/misc/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/misc/Kconfig') diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 32ab718..4ff01ec 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -142,6 +142,9 @@ config AVR_POWER config MCHP_PFSOC_DMC bool +config MCHP_PFSOC_IOSCB + bool + config SIFIVE_TEST bool -- cgit v1.1