From c96a29cdef7659ae7c4a816206915896a8f69e39 Mon Sep 17 00:00:00 2001 From: bellard Date: Sun, 21 Aug 2005 09:40:49 +0000 Subject: Fix MIPS counter / compare interrupt (Ralf Baechle git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1550 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/mips_r4k.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'hw/mips_r4k.c') diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index ca135ac..bb7742f 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -72,7 +72,8 @@ void cpu_mips_store_count (CPUState *env, uint32_t value) void cpu_mips_store_compare (CPUState *env, uint32_t value) { cpu_mips_update_count(env, cpu_mips_get_count(env), value); - pic_set_irq(5, 0); + cpu_single_env->CP0_Cause &= ~0x00008000; + cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); } static void mips_timer_cb (void *opaque) @@ -86,7 +87,8 @@ static void mips_timer_cb (void *opaque) } #endif cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare); - pic_set_irq(5, 1); + cpu_single_env->CP0_Cause |= 0x00008000; + cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD); } void cpu_mips_clock_init (CPUState *env) -- cgit v1.1