From 4de9b249d37c1b382cc3e5a21fad1b4a11cec2fa Mon Sep 17 00:00:00 2001 From: ths Date: Wed, 24 Jan 2007 01:47:51 +0000 Subject: Reworking MIPS interrupt handling, by Aurelien Jarno. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/mips_r4k.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'hw/mips_r4k.c') diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index ffed67c..5fa5b76 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -38,14 +38,7 @@ static PITState *pit; /* PIT i8254 */ /*The PIC is attached to the MIPS CPU INT0 pin */ static void pic_irq_request(void *opaque, int level) { - CPUState *env = first_cpu; - if (level) { - env->CP0_Cause |= 0x00000400; - cpu_interrupt(env, CPU_INTERRUPT_HARD); - } else { - env->CP0_Cause &= ~0x00000400; - cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); - } + cpu_mips_irq_request(opaque, 2, level); } static void mips_qemu_writel (void *opaque, target_phys_addr_t addr, -- cgit v1.1