From a6c3ed24748f06742413e174167b0faa7030c244 Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Thu, 18 Jun 2015 21:16:32 -0700 Subject: target-microblaze: Convert dcache-writeback to a CPU property Originally the dcache-writeback PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias Reviewed-by: Peter Crosthwaite Signed-off-by: Edgar E. Iglesias --- hw/microblaze/petalogix_ml605_mmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'hw/microblaze') diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c index 05c120a..995a579 100644 --- a/hw/microblaze/petalogix_ml605_mmu.c +++ b/hw/microblaze/petalogix_ml605_mmu.c @@ -70,7 +70,6 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu) env->pvr.regs[10] = 0x0e000000; /* virtex 6 */ /* setup pvr to match kernel setting */ - env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK; env->pvr.regs[0] |= PVR0_ENDI; env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8); env->pvr.regs[4] = 0xc56b8000; @@ -98,6 +97,8 @@ petalogix_ml605_init(MachineState *machine) * root instructions */ object_property_set_int(OBJECT(cpu), 1, "use-fpu", &error_abort); + object_property_set_bool(OBJECT(cpu), true, "dcache-writeback", + &error_abort); object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort); /* Attach emulated BRAM through the LMB. */ -- cgit v1.1