From c8a50e596c8eeb41bf5718df5bad6be4080f40c7 Mon Sep 17 00:00:00 2001 From: Avi Kivity Date: Thu, 4 Aug 2011 15:55:30 +0300 Subject: pflash_cfi01/pflash_cfi02: convert to memory API cfi02 is annoying in that is ignores some address bits; we probably want explicit support in the memory API for that. Reviewed-by: Richard Henderson Signed-off-by: Avi Kivity --- hw/mainstone.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) (limited to 'hw/mainstone.c') diff --git a/hw/mainstone.c b/hw/mainstone.c index 4792f0e..78af41b 100644 --- a/hw/mainstone.c +++ b/hw/mainstone.c @@ -101,7 +101,8 @@ static void mainstone_common_init(ram_addr_t ram_size, DeviceState *mst_irq; DriveInfo *dinfo; int i; - int be; + MemoryRegion *flashes = g_new(MemoryRegion, 2); + const MemoryRegionOps *flash_ops; if (!cpu_model) cpu_model = "pxa270-c5"; @@ -113,9 +114,9 @@ static void mainstone_common_init(ram_addr_t ram_size, MAINSTONE_ROM) | IO_MEM_ROM); #ifdef TARGET_WORDS_BIGENDIAN - be = 1; + flash_ops = &pflash_cfi01_ops_be; #else - be = 0; + flash_ops = &pflash_cfi01_ops_le; #endif /* There are two 32MiB flash devices on the board */ for (i = 0; i < 2; i ++) { @@ -126,13 +127,14 @@ static void mainstone_common_init(ram_addr_t ram_size, exit(1); } + memory_region_init_rom_device(&flashes[i], flash_ops, + NULL, (i ? "mainstone.flash1" + : "mainstone.flash0"), + MAINSTONE_FLASH); if (!pflash_cfi01_register(mainstone_flash_base[i], - qemu_ram_alloc(NULL, i ? "mainstone.flash1" : - "mainstone.flash0", - MAINSTONE_FLASH), - dinfo->bdrv, sector_len, - MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0, - be)) { + &flashes[i], dinfo->bdrv, sector_len, + MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, + 0)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); exit(1); } -- cgit v1.1 From 09730e296bcb0fe1471200c5c04681b644f439bd Mon Sep 17 00:00:00 2001 From: Avi Kivity Date: Mon, 8 Aug 2011 21:08:45 +0300 Subject: mainstone: convert to memory API Reviewed-by: Richard Henderson Signed-off-by: Avi Kivity --- hw/mainstone.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'hw/mainstone.c') diff --git a/hw/mainstone.c b/hw/mainstone.c index 78af41b..82e9571 100644 --- a/hw/mainstone.c +++ b/hw/mainstone.c @@ -17,6 +17,7 @@ #include "flash.h" #include "blockdev.h" #include "sysbus.h" +#include "exec-memory.h" /* Device addresses */ #define MST_FPGA_PHYS 0x08000000 @@ -90,7 +91,8 @@ static struct arm_boot_info mainstone_binfo = { .ram_size = 0x04000000, }; -static void mainstone_common_init(ram_addr_t ram_size, +static void mainstone_common_init(MemoryRegion *address_space_mem, + ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, enum mainstone_model_e model, int arm_id) @@ -101,6 +103,7 @@ static void mainstone_common_init(ram_addr_t ram_size, DeviceState *mst_irq; DriveInfo *dinfo; int i; + MemoryRegion *rom = g_new(MemoryRegion, 1); MemoryRegion *flashes = g_new(MemoryRegion, 2); const MemoryRegionOps *flash_ops; @@ -109,9 +112,9 @@ static void mainstone_common_init(ram_addr_t ram_size, /* Setup CPU & memory */ cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model); - cpu_register_physical_memory(0, MAINSTONE_ROM, - qemu_ram_alloc(NULL, "mainstone.rom", - MAINSTONE_ROM) | IO_MEM_ROM); + memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM); + memory_region_set_readonly(rom, true); + memory_region_add_subregion(address_space_mem, 0, rom); #ifdef TARGET_WORDS_BIGENDIAN flash_ops = &pflash_cfi01_ops_be; @@ -172,7 +175,7 @@ static void mainstone_init(ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { - mainstone_common_init(ram_size, kernel_filename, + mainstone_common_init(get_system_memory(), ram_size, kernel_filename, kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196); } -- cgit v1.1