From ddf93261847df55137436abe429aae7f9d8228dd Mon Sep 17 00:00:00 2001 From: Xiaojuan Yang <yangxiaojuan@loongson.cn> Date: Tue, 5 Jul 2022 14:49:00 +0800 Subject: hw/intc/loongarch_ipi: Fix ipi device access of 64bits In general loongarch ipi device, 32bit registers is emulated, however for anysend/mailsend device only 64bit register access is supported. So separate the ipi memory region into two regions, including 32 bits and 64 bits. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- hw/loongarch/loongson3.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'hw/loongarch') diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c index 403dd91..15fddfc 100644 --- a/hw/loongarch/loongson3.c +++ b/hw/loongarch/loongson3.c @@ -230,7 +230,10 @@ static void loongarch_irq_init(LoongArchMachineState *lams) /* IPI iocsr memory region */ memory_region_add_subregion(&env->system_iocsr, SMP_IPI_MAILBOX, sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), - cpu)); + cpu * 2)); + memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), + cpu * 2 + 1)); /* extioi iocsr memory region */ memory_region_add_subregion(&env->system_iocsr, APIC_BASE, sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), -- cgit v1.1