From 0fae92a3133f48f7fb06907c3ed2765266fad9c8 Mon Sep 17 00:00:00 2001 From: Isaku Yamahata Date: Tue, 23 Mar 2021 13:52:25 -0700 Subject: vt82c686.c: don't raise SCI when PCI_INTERRUPT_PIN isn't setup MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Without this patch, the following patch will triger clan runtime sanitizer warnings as follows. This patch proactively works around it. I leave a correct fix to v582c686.c maintainerfix as I'm not sure about fuloong2e device model. > MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} > QTEST_QEMU_IMG=./qemu-img > G_TEST_DBUS_DAEMON=/home/petmay01/linaro/qemu-for-merges/tests/dbus-vmstate-daemon.sh > QTEST_QEMU_BINARY=./qemu-system-mips64el tests/qtest/qom-test --tap -k > PASS 1 qtest-mips64el/qom-test /mips64el/qom/loongson3-virt > PASS 2 qtest-mips64el/qom-test /mips64el/qom/none > PASS 3 qtest-mips64el/qom-test /mips64el/qom/magnum > PASS 4 qtest-mips64el/qom-test /mips64el/qom/mipssim > PASS 5 qtest-mips64el/qom-test /mips64el/qom/malta > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 6 qtest-mips64el/qom-test /mips64el/qom/fuloong2e > PASS 7 qtest-mips64el/qom-test /mips64el/qom/boston > PASS 8 qtest-mips64el/qom-test /mips64el/qom/pica61 > > and similarly for eg > > MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))} > QTEST_QEMU_IMG=./qemu-img > G_TEST_DBUS_DAEMON=/home/petmay01/linaro/qemu-for-merges/tests/dbus-vmstate-daemon.sh > QTEST_QEMU_BINARY=./qemu-system-mips64el tests/qtest/endianness-test > --tap -k > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 1 qtest-mips64el/endianness-test /mips64el/endianness/fuloong2e > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 2 qtest-mips64el/endianness-test /mips64el/endianness/split/fuloong2e > ../../hw/pci/pci.c:252:30: runtime error: shift exponent -1 is negative > PASS 3 qtest-mips64el/endianness-test /mips64el/endianness/combine/fuloong2e Cc: BALATON Zoltan Cc: Huacai Chen Cc: "Philippe Mathieu-Daudé" Cc: Jiaxun Yang Reported-by: Peter Maydell Signed-off-by: Isaku Yamahata Message-Id: <62a5fc69e453fb848bfd4794bae1852a75af73c5.1616532563.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/isa/vt82c686.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'hw/isa') diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 05d084f..f0fb309 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -144,7 +144,18 @@ static void pm_update_sci(ViaPMState *s) ACPI_BITMASK_POWER_BUTTON_ENABLE | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | ACPI_BITMASK_TIMER_ENABLE)) != 0); - pci_set_irq(&s->dev, sci_level); + if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) { + /* + * FIXME: + * Fix device model that realizes this PM device and remove + * this work around. + * The device model should wire SCI and setup + * PCI_INTERRUPT_PIN properly. + * If PIN# = 0(interrupt pin isn't used), don't raise SCI as + * work around. + */ + pci_set_irq(&s->dev, sci_level); + } /* schedule a timer interruption if needed */ acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && !(pmsts & ACPI_BITMASK_TIMER_STATUS)); -- cgit v1.1