From f6783e34380955e9ec0656c7b9fb8936b9733a6a Mon Sep 17 00:00:00 2001 From: Xiaojuan Yang Date: Mon, 6 Jun 2022 20:43:21 +0800 Subject: hw/loongarch: Add LoongArch ipi interrupt support(IPI) This patch realize the IPI interrupt controller. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao Reviewed-by: Richard Henderson Message-Id: <20220606124333.2060567-32-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson --- hw/intc/trace-events | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'hw/intc/trace-events') diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 5271590..3677466 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -287,3 +287,7 @@ sh_intc_register(const char *s, int id, unsigned short v, int c, int m) "%s %u - sh_intc_read(unsigned size, uint64_t offset, unsigned long val) "size %u 0x%" PRIx64 " -> 0x%lx" sh_intc_write(unsigned size, uint64_t offset, unsigned long val) "size %u 0x%" PRIx64 " <- 0x%lx" sh_intc_set(int id, int enable) "setting interrupt group %d to %d" + +# loongarch_ipi.c +loongarch_ipi_read(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 +loongarch_ipi_write(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64 -- cgit v1.1