From 249ad85a4b4ba6e949bba3c5b9932c389e07249c Mon Sep 17 00:00:00 2001 From: Xiaojuan Yang Date: Mon, 6 Jun 2022 20:43:23 +0800 Subject: hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI) This patch realize PCH-MSI interrupt controller. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao Reviewed-by: Richard Henderson Message-Id: <20220606124333.2060567-34-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson --- hw/intc/trace-events | 3 +++ 1 file changed, 3 insertions(+) (limited to 'hw/intc/trace-events') diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 4cdbc01..63c9851 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -300,3 +300,6 @@ loongarch_pch_pic_high_readw(unsigned size, uint64_t addr, uint64_t val) "size: loongarch_pch_pic_high_writew(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 loongarch_pch_pic_readb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 loongarch_pch_pic_writeb(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%" PRIx64 + +# loongarch_pch_msi.c +loongarch_msi_set_irq(int irq_num) "set msi irq %d" -- cgit v1.1