From a9bc470ec208bd27a82100abc9dccf1b69f41b45 Mon Sep 17 00:00:00 2001 From: Frederic Konrad Date: Fri, 24 Nov 2023 14:35:04 +0000 Subject: hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models It seems that the url changed a bit, and it triggers an error. Fix the URLs so the documentation can be reached again. Signed-off-by: Frederic Konrad Reviewed-by: Francisco Iglesias Message-id: 20231124143505.1493184-3-fkonrad@amd.com Signed-off-by: Peter Maydell --- hw/dma/xlnx_csu_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/dma') diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c index e890898..531013f 100644 --- a/hw/dma/xlnx_csu_dma.c +++ b/hw/dma/xlnx_csu_dma.c @@ -33,7 +33,7 @@ /* * Ref: UG1087 (v1.7) February 8, 2019 - * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html + * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers * CSUDMA Module section */ REG32(ADDR, 0x0) -- cgit v1.1