From 1d8d4d866c62a0d0b7ee9468cf6e121ad1bfb2b1 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Add registers for getting apertures Some drivers (e.g. Linux radeon drm and MacOS) access these to find apertures to access card. Try to implement these but not sure these are correct yet. Signed-off-by: BALATON Zoltan Message-id: b2df13655feecd63c0049ec45fd87d1026f67091.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 15 +++++++++++++++ hw/display/ati_dbg.c | 5 +++++ hw/display/ati_regs.h | 5 +++++ 3 files changed, 25 insertions(+) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index 35f49a5..6cdcbef 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -307,6 +307,21 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) case CNFG_MEMSIZE: val = s->vga.vram_size; break; + case CONFIG_APER_0_BASE: + case CONFIG_APER_1_BASE: + val = pci_default_read_config(&s->dev, + PCI_BASE_ADDRESS_0, size) & 0xfffffff0; + break; + case CONFIG_APER_SIZE: + val = s->vga.vram_size; + break; + case CONFIG_REG_1_BASE: + val = pci_default_read_config(&s->dev, + PCI_BASE_ADDRESS_2, size) & 0xfffffff0; + break; + case CONFIG_REG_APER_SIZE: + val = memory_region_size(&s->mm); + break; case MC_STATUS: val = 5; break; diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c index 88b3a11..cbc5202 100644 --- a/hw/display/ati_dbg.c +++ b/hw/display/ati_dbg.c @@ -28,6 +28,11 @@ static struct ati_regdesc ati_reg_names[] = { {"CNFG_CNTL", 0x00e0}, {"GEN_RESET_CNTL", 0x00f0}, {"CNFG_MEMSIZE", 0x00f8}, + {"CONFIG_APER_0_BASE", 0x0100}, + {"CONFIG_APER_1_BASE", 0x0104}, + {"CONFIG_APER_SIZE", 0x0108}, + {"CONFIG_REG_1_BASE", 0x010c}, + {"CONFIG_REG_APER_SIZE", 0x0110}, {"MEM_CNTL", 0x0140}, {"MC_FB_LOCATION", 0x0148}, {"MC_AGP_LOCATION", 0x014C}, diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index d7155c9..81fb530 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -46,6 +46,11 @@ #define CNFG_CNTL 0x00e0 #define GEN_RESET_CNTL 0x00f0 #define CNFG_MEMSIZE 0x00f8 +#define CONFIG_APER_0_BASE 0x0100 +#define CONFIG_APER_1_BASE 0x0104 +#define CONFIG_APER_SIZE 0x0108 +#define CONFIG_REG_1_BASE 0x010c +#define CONFIG_REG_APER_SIZE 0x0110 #define MEM_CNTL 0x0140 #define MC_FB_LOCATION 0x0148 #define MC_AGP_LOCATION 0x014C -- cgit v1.1 From df1e4cf4e72b7ff7ec239afedaf7880ae667e431 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Add some register definitions for debugging Add names for AMCGPIO regs to make it easier to identify these in trace output. This is where rage128p has the DDC from the DVI port among others but because we don't implement the flat panel controller we don't want to connect an EDID here to make sure drivers use the VGA output instead. But since these are often probed by drivers it helps to see what happens by logging these registers by name. Signed-off-by: BALATON Zoltan Message-id: 31ff69ca6959d090869907774faa1af7d2c02b2b.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati_dbg.c | 4 ++++ hw/display/ati_regs.h | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'hw/display') diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c index cbc5202..7e59c41 100644 --- a/hw/display/ati_dbg.c +++ b/hw/display/ati_dbg.c @@ -23,6 +23,10 @@ static struct ati_regdesc ati_reg_names[] = { {"GPIO_DVI_DDC", 0x0064}, {"GPIO_MONID", 0x0068}, {"I2C_CNTL_1", 0x0094}, + {"AMCGPIO_MASK_MIR", 0x009c}, + {"AMCGPIO_A_MIR", 0x00a0}, + {"AMCGPIO_Y_MIR", 0x00a4}, + {"AMCGPIO_EN_MIR", 0x00a8}, {"PALETTE_INDEX", 0x00b0}, {"PALETTE_DATA", 0x00b4}, {"CNFG_CNTL", 0x00e0}, diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index 81fb530..91947ab 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -41,6 +41,10 @@ #define GPIO_DVI_DDC 0x0064 #define GPIO_MONID 0x0068 #define I2C_CNTL_1 0x0094 +#define AMCGPIO_MASK_MIR 0x009c +#define AMCGPIO_A_MIR 0x00a0 +#define AMCGPIO_Y_MIR 0x00a4 +#define AMCGPIO_EN_MIR 0x00a8 #define PALETTE_INDEX 0x00b0 #define PALETTE_DATA 0x00b4 #define CNFG_CNTL 0x00e0 -- cgit v1.1 From 006388a8c78124eb193027366894fe4568065447 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Fix GPIO_MONID register write Also update bitbang_i2c state when output bits are changed while enable bits are set. This fixes EDID access by the ATI FCode ROM. Signed-off-by: BALATON Zoltan Message-id: 292e70a92b7fbfd9a4120d433dbdcfda4e5f6c3c.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index 6cdcbef..eb54f68 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -564,12 +564,15 @@ static void ati_mm_write(void *opaque, hwaddr addr, addr - GPIO_MONID, data, size); /* * Rage128p accesses DDC used to get EDID via these bits. - * Only touch i2c when write overlaps 3rd byte because some - * drivers access this reg via multiple partial writes and - * without this spurious bits would be sent. + * Because some drivers access this via multiple byte writes + * we have to be careful when we send bits to avoid spurious + * changes in bitbang_i2c state. So only do it when mask is set + * and either the enable bits are changed or output bits changed + * while enabled. */ if ((s->regs.gpio_monid & BIT(25)) && - addr <= GPIO_MONID + 2 && addr + size > GPIO_MONID + 2) { + ((addr <= GPIO_MONID + 2 && addr + size > GPIO_MONID + 2) || + (addr == GPIO_MONID && (s->regs.gpio_monid & 0x60000)))) { s->regs.gpio_monid = ati_i2c(&s->bbi2c, s->regs.gpio_monid, 1); } } -- cgit v1.1 From 50bc6af55eae65768dbc8086e793688ee0bab239 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Fix cursor color with guest_hwcursor=true MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes: a38127414bd007c5b6ae64c664d9e8839393277e Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé Message-id: d99f9e07923a74932dbb15e93dd50aa8d2816b19.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index eb54f68..d372e34 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -207,7 +207,7 @@ static void ati_cursor_draw_line(VGACommonState *vga, uint8_t *d, int scr_y) } } else { color = (xbits & BIT(7) ? s->regs.cur_color1 : - s->regs.cur_color0) << 8 | 0xff; + s->regs.cur_color0) | 0xff000000; } if (vga->hw_cursor_x + i * 8 + j >= h) { return; /* end of screen, don't span to next line */ -- cgit v1.1 From 747d7ad231a0955991e179deb482ce94376f1e17 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Fix hardware cursor image offset The crtc_offset is not needed, cur_offset is relative to the start of vram not the start of displayed area. This fixes broken pointer image with MacOS that uses non-0 crtc_offset. Signed-off-by: BALATON Zoltan Message-id: e6acb1fa3ca980dc948045443e5986e2aa79bf7c.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index d372e34..ff04f7e 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -132,9 +132,8 @@ static void ati_cursor_define(ATIVGAState *s) return; /* Do not update cursor if locked or rendered by guest */ } /* FIXME handle cur_hv_offs correctly */ - src = s->vga.vram_ptr + (s->regs.crtc_offset & 0x07ffffff) + - s->regs.cur_offset - (s->regs.cur_hv_offs >> 16) - - (s->regs.cur_hv_offs & 0xffff) * 16; + src = s->vga.vram_ptr + s->regs.cur_offset - + (s->regs.cur_hv_offs >> 16) - (s->regs.cur_hv_offs & 0xffff) * 16; for (i = 0; i < 64; i++) { for (j = 0; j < 8; j++, idx++) { data[idx] = src[i * 16 + j]; @@ -190,8 +189,7 @@ static void ati_cursor_draw_line(VGACommonState *vga, uint8_t *d, int scr_y) return; } /* FIXME handle cur_hv_offs correctly */ - src = s->vga.vram_ptr + (s->regs.crtc_offset & 0x07ffffff) + - s->cursor_offset + (scr_y - vga->hw_cursor_y) * 16; + src = s->vga.vram_ptr + s->cursor_offset + (scr_y - vga->hw_cursor_y) * 16; dp = &dp[vga->hw_cursor_x]; h = ((s->regs.crtc_h_total_disp >> 16) + 1) * 8; for (i = 0; i < 8; i++) { -- cgit v1.1 From c026350a842a02c225e3ecbcda5c298e70e37a62 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Attempt to handle CRTC offset not exact multiple of stride MacOS uses non-0 offset so it needs this and the resulting vbe_start_addr seems correct but picture is still broken with OpenBIOS after FCode runs but that maybe due to firmware problems now. After boot, picture is now correct. It also occured to me that these CRTC regs are also present in VGA so I wonder if they should be shared in case some drivers try to poke them via VGA regs or these are a separate set of regs for extended mode. Added a comment noting this but drivers I've tried so far program the card accessing ati regs so I did not attempt to change it. Signed-off-by: BALATON Zoltan Message-id: 1c6fce457ef7e6f889e38dc0423791be92310a62.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 22 +++++++++++++++------- 1 file changed, 15 insertions(+), 7 deletions(-) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index ff04f7e..f24c23f 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -50,6 +50,7 @@ static void ati_vga_switch_mode(ATIVGAState *s) s->mode = EXT_MODE; if (s->regs.crtc_gen_cntl & CRTC2_EN) { /* CRT controller enabled, use CRTC values */ + /* FIXME Should these be the same as VGA CRTC regs? */ uint32_t offs = s->regs.crtc_offset & 0x07ffffff; int stride = (s->regs.crtc_pitch & 0x7ff) * 8; int bpp = 0; @@ -101,16 +102,23 @@ static void ati_vga_switch_mode(ATIVGAState *s) (s->regs.dac_cntl & DAC_8BIT_EN ? VBE_DISPI_8BIT_DAC : 0)); /* now set offset and stride after enable as that resets these */ if (stride) { + int bypp = DIV_ROUND_UP(bpp, BITS_PER_BYTE); + vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_VIRT_WIDTH); vbe_ioport_write_data(&s->vga, 0, stride); - if (offs % stride == 0) { - vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_Y_OFFSET); - vbe_ioport_write_data(&s->vga, 0, offs / stride); - } else { - /* FIXME what to do with this? */ - error_report("VGA offset is not multiple of pitch, " - "expect bad picture"); + stride *= bypp; + if (offs % stride) { + DPRINTF("CRTC offset is not multiple of pitch\n"); + vbe_ioport_write_index(&s->vga, 0, + VBE_DISPI_INDEX_X_OFFSET); + vbe_ioport_write_data(&s->vga, 0, offs % stride / bypp); } + vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_Y_OFFSET); + vbe_ioport_write_data(&s->vga, 0, offs / stride); + DPRINTF("VBE offset (%d,%d), vbe_start_addr=%x\n", + s->vga.vbe_regs[VBE_DISPI_INDEX_X_OFFSET], + s->vga.vbe_regs[VBE_DISPI_INDEX_Y_OFFSET], + s->vga.vbe_start_addr); } } } else { -- cgit v1.1 From 8bb9a2b26d83a0989367e3688badb2914283827d Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Sun, 11 Aug 2019 23:14:53 +0200 Subject: ati-vga: Add limited support for big endian frame buffer aperture Set frame buffer endianness according to requested endianness for frame buffer apertures. We set frame buffer to big endian if any of the two apertures are set to big endian. Using different endianness for the two apertures is not implemented. This fixes inverted colors with MacOS and Xorg frame buffer driver but some Linux drivers may have endianness issues even on real hardware so this may not fix all cases. MorphOS uses aper0 in LE, Linux uses aper0 in BE and MacOS uses aper1 in BE but not sure about others or if MacOS also may need aper0 in which case we'll need a more complex fix but MacOS has other problems yet so for now this might work. Signed-off-by: BALATON Zoltan Message-id: e2a7ec7af3fc30523213bcd27832ccad34323f2c.1565558093.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 10 +++++++++- hw/display/ati_int.h | 1 + hw/display/ati_regs.h | 2 ++ 3 files changed, 12 insertions(+), 1 deletion(-) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index f24c23f..cceb45b 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -90,7 +90,9 @@ static void ati_vga_switch_mode(ATIVGAState *s) DPRINTF("Switching to %dx%d %d %d @ %x\n", h, v, stride, bpp, offs); vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_ENABLE); vbe_ioport_write_data(&s->vga, 0, VBE_DISPI_DISABLED); - s->vga.big_endian_fb = false; + s->vga.big_endian_fb = (s->regs.config_cntl & APER_0_ENDIAN || + s->regs.config_cntl & APER_1_ENDIAN ? + true : false); /* reset VBE regs then set up mode */ s->vga.vbe_regs[VBE_DISPI_INDEX_XRES] = h; s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] = v; @@ -310,6 +312,9 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) case PALETTE_DATA: val = vga_ioport_read(&s->vga, VGA_PEL_D); break; + case CNFG_CNTL: + val = s->regs.config_cntl; + break; case CNFG_MEMSIZE: val = s->vga.vram_size; break; @@ -604,6 +609,9 @@ static void ati_mm_write(void *opaque, hwaddr addr, data >>= 8; vga_ioport_write(&s->vga, VGA_PEL_D, data & 0xff); break; + case CNFG_CNTL: + s->regs.config_cntl = data; + break; case CRTC_H_TOTAL_DISP: s->regs.crtc_h_total_disp = data & 0x07ff07ff; break; diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index 31a1927..5b4d3be 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -39,6 +39,7 @@ typedef struct ATIVGARegs { uint32_t gpio_vga_ddc; uint32_t gpio_dvi_ddc; uint32_t gpio_monid; + uint32_t config_cntl; uint32_t crtc_h_total_disp; uint32_t crtc_h_sync_strt_wid; uint32_t crtc_v_total_disp; diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index 91947ab..02046e9 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -317,6 +317,8 @@ #define X_MPLL_REF_DIV_MASK 0x000000FF /* Config control values (CONFIG_CNTL) */ +#define APER_0_ENDIAN 0x00000003 +#define APER_1_ENDIAN 0x0000000c #define CFG_VGA_IO_DIS 0x00000400 /* CRTC control values (CRTC_GEN_CNTL) */ -- cgit v1.1 From b7105d280cab053465de79ff1766d2f7e1ea7554 Mon Sep 17 00:00:00 2001 From: BALATON Zoltan Date: Fri, 16 Aug 2019 00:18:09 +0200 Subject: ati-vga: Implement dummy VBlank IRQ The MacOS driver exits if the card does not have an interrupt. If we set PCI_INTERRUPT_PIN to 1 then it enables VBlank interrupts and it boots but the mouse pointer cannot be moved. This patch implements a dummy VBlank interrupt triggered by a 60 Hz timer. With this the pointer now moves but MacOS still hangs somewhere before completely finishing boot. Signed-off-by: BALATON Zoltan Message-Id: <89364275f2fb5f85ee73c0e76528aa91691a499a.1565907489.git.balaton@eik.bme.hu> Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ hw/display/ati_dbg.c | 1 + hw/display/ati_int.h | 4 ++++ hw/display/ati_regs.h | 6 ++++++ 4 files changed, 55 insertions(+) (limited to 'hw/display') diff --git a/hw/display/ati.c b/hw/display/ati.c index cceb45b..8f940ee 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -243,6 +243,21 @@ static uint64_t ati_i2c(bitbang_i2c_interface *i2c, uint64_t data, int base) return data; } +static void ati_vga_update_irq(ATIVGAState *s) +{ + pci_set_irq(&s->dev, !!(s->regs.gen_int_status & s->regs.gen_int_cntl)); +} + +static void ati_vga_vblank_irq(void *opaque) +{ + ATIVGAState *s = opaque; + + timer_mod(&s->vblank_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + + NANOSECONDS_PER_SECOND / 60); + s->regs.gen_int_status |= CRTC_VBLANK_INT; + ati_vga_update_irq(s); +} + static inline uint64_t ati_reg_read_offs(uint32_t reg, int offs, unsigned int size) { @@ -283,6 +298,12 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) addr - (BIOS_0_SCRATCH + i * 4), size); break; } + case GEN_INT_CNTL: + val = s->regs.gen_int_cntl; + break; + case GEN_INT_STATUS: + val = s->regs.gen_int_status; + break; case CRTC_GEN_CNTL ... CRTC_GEN_CNTL + 3: val = ati_reg_read_offs(s->regs.crtc_gen_cntl, addr - CRTC_GEN_CNTL, size); @@ -512,6 +533,21 @@ static void ati_mm_write(void *opaque, hwaddr addr, addr - (BIOS_0_SCRATCH + i * 4), data, size); break; } + case GEN_INT_CNTL: + s->regs.gen_int_cntl = data; + if (data & CRTC_VBLANK_INT) { + ati_vga_vblank_irq(s); + } else { + timer_del(&s->vblank_timer); + ati_vga_update_irq(s); + } + break; + case GEN_INT_STATUS: + data &= (s->dev_id == PCI_DEVICE_ID_ATI_RAGE128_PF ? + 0x000f040fUL : 0xfc080effUL); + s->regs.gen_int_status &= ~data; + ati_vga_update_irq(s); + break; case CRTC_GEN_CNTL ... CRTC_GEN_CNTL + 3: { uint32_t val = s->regs.crtc_gen_cntl; @@ -902,12 +938,19 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) pci_register_bar(dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, &s->io); pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->mm); + + /* most interrupts are not yet emulated but MacOS needs at least VBlank */ + dev->config[PCI_INTERRUPT_PIN] = 1; + timer_init_ns(&s->vblank_timer, QEMU_CLOCK_VIRTUAL, ati_vga_vblank_irq, s); } static void ati_vga_reset(DeviceState *dev) { ATIVGAState *s = ATI_VGA(dev); + timer_del(&s->vblank_timer); + ati_vga_update_irq(s); + /* reset vga */ vga_common_reset(&s->vga); s->mode = VGA_MODE; @@ -917,6 +960,7 @@ static void ati_vga_exit(PCIDevice *dev) { ATIVGAState *s = ATI_VGA(dev); + timer_del(&s->vblank_timer); graphic_console_close(s->vga.con); } diff --git a/hw/display/ati_dbg.c b/hw/display/ati_dbg.c index 7e59c41..0ebbd36 100644 --- a/hw/display/ati_dbg.c +++ b/hw/display/ati_dbg.c @@ -16,6 +16,7 @@ static struct ati_regdesc ati_reg_names[] = { {"BUS_CNTL", 0x0030}, {"BUS_CNTL1", 0x0034}, {"GEN_INT_CNTL", 0x0040}, + {"GEN_INT_STATUS", 0x0044}, {"CRTC_GEN_CNTL", 0x0050}, {"CRTC_EXT_CNTL", 0x0054}, {"DAC_CNTL", 0x0058}, diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index 5b4d3be..2a16708 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -9,6 +9,7 @@ #ifndef ATI_INT_H #define ATI_INT_H +#include "qemu/timer.h" #include "hw/pci/pci.h" #include "hw/i2c/bitbang_i2c.h" #include "vga_int.h" @@ -33,6 +34,8 @@ typedef struct ATIVGARegs { uint32_t mm_index; uint32_t bios_scratch[8]; + uint32_t gen_int_cntl; + uint32_t gen_int_status; uint32_t crtc_gen_cntl; uint32_t crtc_ext_cntl; uint32_t dac_cntl; @@ -89,6 +92,7 @@ typedef struct ATIVGAState { uint16_t cursor_size; uint32_t cursor_offset; QEMUCursor *cursor; + QEMUTimer vblank_timer; bitbang_i2c_interface bbi2c; MemoryRegion io; MemoryRegion mm; diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index 02046e9..ebd37ee 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -34,6 +34,7 @@ #define BUS_CNTL 0x0030 #define BUS_CNTL1 0x0034 #define GEN_INT_CNTL 0x0040 +#define GEN_INT_STATUS 0x0044 #define CRTC_GEN_CNTL 0x0050 #define CRTC_EXT_CNTL 0x0054 #define DAC_CNTL 0x0058 @@ -316,6 +317,11 @@ #define XPLL_FB_DIV_MASK 0x0000FF00 #define X_MPLL_REF_DIV_MASK 0x000000FF +/* GEN_INT_CNTL) */ +#define CRTC_VBLANK_INT 0x00000001 +#define CRTC_VLINE_INT 0x00000002 +#define CRTC_VSYNC_INT 0x00000004 + /* Config control values (CONFIG_CNTL) */ #define APER_0_ENDIAN 0x00000003 #define APER_1_ENDIAN 0x0000000c -- cgit v1.1